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author | Lisa Hsu <hsul@eecs.umich.edu> | 2004-06-21 17:25:18 -0400 |
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committer | Lisa Hsu <hsul@eecs.umich.edu> | 2004-06-21 17:25:18 -0400 |
commit | e05dbb5116b9ff0984ea8214ec921d2db3aed41d (patch) | |
tree | 70a309c94c6776f673a9204f616ce3328dca88c8 /base/traceflags.py | |
parent | 074969f8f16110680de05fca64a6be48aedcdfd8 (diff) | |
download | gem5-e05dbb5116b9ff0984ea8214ec921d2db3aed41d.tar.xz |
l
base/traceflags.py:
added some more traceflags for ethernet to break it up better
dev/etherpkt.hh:
since we are not network host order, must reverse bytes for these typechecks.
also, overload isTcp/UdpPkt to take an argument so you don't have to reget the ip header if you've already got one.
dev/ns_gige.cc:
1) add some functions that reverse Endianness so we can generate adn evaluate checksum adn dprintf data accurately/more understandably
2) forget about the implementation of fifo fill/drain thresholds, it's not used by the driver much, nor does it matter with use sending/receiving in whole packets anyway.
get rid of teh associated variables.
3) get rid of txFifoCnt the variable, it's redundant and unnecessary, just use txFifoAvail.
4) change io_enable to ioEnable, just to be picky.
5) modify some DPRINTF's to be clearer, also added a lot, and spread them into better traceflag categories
6) fix the device bug! it's the intrTick = 0 at teh beginning of cpuInterrupt().
7) clear some bools in regsReset() so they don't holdover wrong state
8) fix pseudo header generation for Tcp checksumming to account for network order
dev/ns_gige.hh:
change io_enable to ioEnable, get rid of fill/drain thresh related variables and txFifoCnt, which is redundant
--HG--
extra : convert_revision : c538b75731f3c9e04354f57e6df9a40aeca5096d
Diffstat (limited to 'base/traceflags.py')
-rw-r--r-- | base/traceflags.py | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/base/traceflags.py b/base/traceflags.py index 3d7623965..0898a283a 100644 --- a/base/traceflags.py +++ b/base/traceflags.py @@ -74,6 +74,10 @@ baseFlags = [ 'EthernetPIO', 'EthernetDMA', 'EthernetData', + 'EthernetDesc', + 'EthernetIntr', + 'EthernetSM', + 'EthernetCksum', 'GDBMisc', 'GDBAcc', 'GDBRead', @@ -124,7 +128,7 @@ compoundFlagMap = { 'GDBAll' : [ 'GDBMisc', 'GDBAcc', 'GDBRead', 'GDBWrite', 'GDBSend', 'GDBRecv', 'GDBExtra' ], 'ScsiAll' : [ 'ScsiDisk', 'ScsiCtrl', 'ScsiNone' ], 'DiskImageAll' : [ 'DiskImage', 'DiskImageRead', 'DiskImageWrite' ], - 'EthernetAll' : [ 'Ethernet', 'EthernetPIO', 'EthernetDMA', 'EthernetData' ], + 'EthernetAll' : [ 'Ethernet', 'EthernetPIO', 'EthernetDMA', 'EthernetData' , 'EthernetDesc', 'EthernetIntr', 'EthernetSM', 'EthernetCksum' ], 'IdeAll' : [ 'IdeCtrl', 'IdeDisk' ] } |