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authorKevin Lim <ktlim@umich.edu>2004-08-20 14:54:07 -0400
committerKevin Lim <ktlim@umich.edu>2004-08-20 14:54:07 -0400
commit04745696b6b523c5e90c335298099600d4a14a76 (patch)
tree66b578f8c44355ccf8e970fe59b52554dde9d0ce /base/traceflags.py
parent8295a8050c1096dc560f4976724adada810e56e1 (diff)
downloadgem5-04745696b6b523c5e90c335298099600d4a14a76.tar.xz
Check in of new CPU. This checkin works under non-Fullsystem mode, with no caches.
SConscript: Added new CPU files to build. arch/alpha/isa_desc: Changed rduniq and wruniq to be nonspeculative because the uniq register is not renamed. arch/isa_parser.py: Added new CPU exec method. base/statistics.hh: Minor change for namespace conflict. Probably can change back one the new CPU files are cleaned up. base/traceflags.py: Added new CPU trace flags. cpu/static_inst.hh: Changed static inst to use a file that defines the execute functions. --HG-- extra : convert_revision : bd4ce34361308280168324817fc1258dd253e519
Diffstat (limited to 'base/traceflags.py')
-rw-r--r--base/traceflags.py16
1 files changed, 14 insertions, 2 deletions
diff --git a/base/traceflags.py b/base/traceflags.py
index 4be61d7ee..8b4208660 100644
--- a/base/traceflags.py
+++ b/base/traceflags.py
@@ -122,7 +122,18 @@ baseFlags = [
'Tsunami',
'Uart',
'Split',
- 'SQL'
+ 'SQL',
+ 'Fetch',
+ 'Decode',
+ 'Rename',
+ 'IEW',
+ 'Commit',
+ 'IQ',
+ 'ROB',
+ 'FreeList',
+ 'RenameMap',
+ 'DynInst',
+ 'FullCPU'
]
#
@@ -138,7 +149,8 @@ compoundFlagMap = {
'ScsiAll' : [ 'ScsiDisk', 'ScsiCtrl', 'ScsiNone' ],
'DiskImageAll' : [ 'DiskImage', 'DiskImageRead', 'DiskImageWrite' ],
'EthernetAll' : [ 'Ethernet', 'EthernetPIO', 'EthernetDMA', 'EthernetData' , 'EthernetDesc', 'EthernetIntr', 'EthernetSM', 'EthernetCksum' ],
- 'IdeAll' : [ 'IdeCtrl', 'IdeDisk' ]
+ 'IdeAll' : [ 'IdeCtrl', 'IdeDisk' ],
+ 'FullCPUAll' : [ 'Fetch', 'Decode', 'Rename', 'IEW', 'Commit', 'IQ', 'ROB', 'FreeList', 'RenameMap', 'DynInst', 'FullCPU']
}
#############################################################