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authorAli Saidi <saidi@eecs.umich.edu>2006-03-30 15:59:49 -0500
committerAli Saidi <saidi@eecs.umich.edu>2006-03-30 15:59:49 -0500
commite196d20d9d047a869e1d853fd02077b1d909a576 (patch)
tree3b45bd223ff1d144af5f94fc9431f01b8a0bad61 /base
parent0b2deb2a8897fa857d2b3e1936401c6666fdc728 (diff)
downloadgem5-e196d20d9d047a869e1d853fd02077b1d909a576.tar.xz
Make TranslatingPort be a type of Port rather than something special
arch/alpha/arguments.cc: rather than returning 0, put a panic in... it will actually make us fix this rather than scratching our respective heads base/loader/object_file.cc: base/loader/object_file.hh: Object loader now takes a port rather than a translating port cpu/cpu_exec_context.cc: cpu/cpu_exec_context.hh: sim/process.cc: Make translating port a type of port rather than anything special cpu/simple/cpu.cc: no need to grab a port from the cpu anymore mem/physical.cc: add an additional type of port to physicalmemory called "functional" Only used for functional accesses (loading binaries/syscall emu) mem/port.hh: make readBlok/writeBlob virtual so translating port can do the translation first mem/translating_port.cc: mem/translating_port.hh: Make TranslatingPort inherit from Port sim/system.cc: header file that doesn't exit removed --HG-- extra : convert_revision : 89b08f6146bba61f5605678d736055feab2fe6f7
Diffstat (limited to 'base')
-rw-r--r--base/loader/object_file.cc8
-rw-r--r--base/loader/object_file.hh6
2 files changed, 7 insertions, 7 deletions
diff --git a/base/loader/object_file.cc b/base/loader/object_file.cc
index 7f46ae2fb..00c094166 100644
--- a/base/loader/object_file.cc
+++ b/base/loader/object_file.cc
@@ -63,7 +63,7 @@ ObjectFile::~ObjectFile()
bool
-ObjectFile::loadSection(Section *sec, TranslatingPort *memPort, bool loadPhys)
+ObjectFile::loadSection(Section *sec, Port *memPort, bool loadPhys)
{
if (sec->size != 0) {
Addr addr = sec->baseAddr;
@@ -74,11 +74,11 @@ ObjectFile::loadSection(Section *sec, TranslatingPort *memPort, bool loadPhys)
}
if (sec->fileImage) {
- memPort->writeBlob(addr, sec->fileImage, sec->size, true);
+ memPort->writeBlob(addr, sec->fileImage, sec->size);
}
else {
// no image: must be bss
- memPort->memsetBlob(addr, 0, sec->size, true);
+ memPort->memsetBlob(addr, 0, sec->size);
}
}
return true;
@@ -86,7 +86,7 @@ ObjectFile::loadSection(Section *sec, TranslatingPort *memPort, bool loadPhys)
bool
-ObjectFile::loadSections(TranslatingPort *memPort, bool loadPhys)
+ObjectFile::loadSections(Port *memPort, bool loadPhys)
{
return (loadSection(&text, memPort, loadPhys)
&& loadSection(&data, memPort, loadPhys)
diff --git a/base/loader/object_file.hh b/base/loader/object_file.hh
index 309089728..b47e1981b 100644
--- a/base/loader/object_file.hh
+++ b/base/loader/object_file.hh
@@ -33,7 +33,7 @@
#include "sim/host.hh" // for Addr
-class TranslatingPort;
+class Port;
class SymbolTable;
class ObjectFile
@@ -72,7 +72,7 @@ class ObjectFile
void close();
- virtual bool loadSections(TranslatingPort *memPort, bool loadPhys = false);
+ virtual bool loadSections(Port *memPort, bool loadPhys = false);
virtual bool loadGlobalSymbols(SymbolTable *symtab) = 0;
virtual bool loadLocalSymbols(SymbolTable *symtab) = 0;
@@ -94,7 +94,7 @@ class ObjectFile
Section data;
Section bss;
- bool loadSection(Section *sec, TranslatingPort *memPort, bool loadPhys);
+ bool loadSection(Section *sec, Port *memPort, bool loadPhys);
void setGlobalPointer(Addr global_ptr) { globalPtr = global_ptr; }
public: