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| author | Christian Menard <Christian.Menard@tu-dresden.de> | 2017-02-09 19:15:46 -0500 |
|---|---|---|
| committer | Christian Menard <Christian.Menard@tu-dresden.de> | 2017-02-09 19:15:46 -0500 |
| commit | 0c4a69bcbf851e3ece8fae5b1159540206036ee8 (patch) | |
| tree | b44f7e709c243e85cc9f6fb921d3e4b975ccba33 /build_opts/HSAIL_X86 | |
| parent | b5045005de6747a5247deb13af9974cfc6b73b08 (diff) | |
| download | gem5-0c4a69bcbf851e3ece8fae5b1159540206036ee8.tar.xz | |
misc: Clean up and complete the gem5<->SystemC-TLM bridge [8/10]
The current TLM bridge only provides a Slave Port that allows the gem5
world to send request to the SystemC world. This patch series refractors
and cleans up the existing code, and adds a Master Port that allows the
SystemC world to send requests to the gem5 world.
This patch:
* bugfix: The BEGIN_RESP also needs to be handled when END_REQ was
* skipped
and '&trans == blockingRequest && phase == tlm::BEGIN_RESP'
evaluates to true.
Reviewed at http://reviews.gem5.org/r/3797/
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'build_opts/HSAIL_X86')
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