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authorMitch Hayenga <mitch.hayenga@arm.com>2014-09-03 07:42:33 -0400
committerMitch Hayenga <mitch.hayenga@arm.com>2014-09-03 07:42:33 -0400
commit976f27487b57e968a326752fcf74747427733df6 (patch)
tree16c9e61f702f21d82948b1f5b555ef1b7c543b15 /configs/common/CacheConfig.py
parentfd722946dd723bda5bd4aea5eedbda108141a550 (diff)
downloadgem5-976f27487b57e968a326752fcf74747427733df6.tar.xz
cpu: Change writeback modeling for outstanding instructions
As highlighed on the mailing list gem5's writeback modeling can impact performance. This patch removes the limitation on maximum outstanding issued instructions, however the number that can writeback in a single cycle is still respected in instToCommit().
Diffstat (limited to 'configs/common/CacheConfig.py')
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