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author | Abdul Mutaal Ahmad <abdul.mutaal@gmail.com> | 2016-07-01 09:45:21 -0500 |
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committer | Abdul Mutaal Ahmad <abdul.mutaal@gmail.com> | 2016-07-01 09:45:21 -0500 |
commit | 7cb0c7bd65a61f7f0bf75a1f0b2eaffb185bf112 (patch) | |
tree | 79e135da2206b0785f4becae2c82dab1aa6ecdbc /configs/common/CacheConfig.py | |
parent | 1051223318360a74c46c0f818bdc599287a51064 (diff) | |
download | gem5-7cb0c7bd65a61f7f0bf75a1f0b2eaffb185bf112.tar.xz |
mem: different HMC configuration
In this new hmc configuration we have used the existing components in gem5
mainly [SerialLink] [NoncoherentXbar]& [DRAMCtrl] to define 3 different
architecture for HMC.
Highlights
1- It explores 3 different HMC architectures
2- It creates 4-HMC crossbars and attaches 16 vault controllers with it.
This will connect vaults to serial links
3- From the previous version, HMCController with round robin funtionality
is being removed and all the serial links are being accessible directly
from user ports
4- Latency incorporated by HMCController (in previous version) is being
added to SerialLink
Committed by Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'configs/common/CacheConfig.py')
0 files changed, 0 insertions, 0 deletions