diff options
| author | Andreas Sandberg <andreas.sandberg@arm.com> | 2017-06-26 14:35:17 +0100 |
|---|---|---|
| committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2017-07-03 09:47:19 +0000 |
| commit | 3212bdf3a89addef371bd7d3f43c322b002644db (patch) | |
| tree | 1fed0da5283d032453be081f9f7ec7fd77904a85 /configs/common/CacheConfig.py | |
| parent | 90c7e56bf407a180fb4d9b4c7721066480836473 (diff) | |
| download | gem5-3212bdf3a89addef371bd7d3f43c322b002644db.tar.xz | |
config: Move core timing models to config/common/cores
Change-Id: I189b6462cc64f7cc6c1b7a6c2af1abb60e1854de
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Gabor Dozsa <gabor.dozsa@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/3943
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'configs/common/CacheConfig.py')
| -rw-r--r-- | configs/common/CacheConfig.py | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/configs/common/CacheConfig.py b/configs/common/CacheConfig.py index d9d0ae748..a0a18a3aa 100644 --- a/configs/common/CacheConfig.py +++ b/configs/common/CacheConfig.py @@ -55,9 +55,9 @@ def config_cache(options, system): if options.cpu_type == "O3_ARM_v7a_3": try: - from O3_ARM_v7a import * + from cores.arm.O3_ARM_v7a import * except: - print "arm_detailed is unavailable. Did you compile the O3 model?" + print "O3_ARM_v7a_3 is unavailable. Did you compile the O3 model?" sys.exit(1) dcache_class, icache_class, l2_cache_class, walk_cache_class = \ |