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author | Iru Cai <mytbk920423@gmail.com> | 2019-02-28 17:07:41 +0800 |
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committer | Iru Cai <mytbk920423@gmail.com> | 2019-03-18 15:27:57 +0800 |
commit | d141cceb48dea533f96d644c3b979d961a7ea0ad (patch) | |
tree | 0e3aa3325e76c6987090026fa2034fb8e5a6c4f6 /configs/common/CpuConfig.py | |
parent | ce003b28a15104574bed634923564a6bd910898d (diff) | |
download | gem5-d141cceb48dea533f96d644c3b979d961a7ea0ad.tar.xz |
invisispec-1.0 configs
Diffstat (limited to 'configs/common/CpuConfig.py')
-rw-r--r-- | configs/common/CpuConfig.py | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/configs/common/CpuConfig.py b/configs/common/CpuConfig.py index 3f193ae60..653220528 100644 --- a/configs/common/CpuConfig.py +++ b/configs/common/CpuConfig.py @@ -88,6 +88,35 @@ def cpu_names(): """Return a list of valid CPU names.""" return _cpu_classes.keys() +# [InvisiSpec] add knob to configure the CPU modes/simulation schemes +def config_scheme(cpu_cls, cpu_list, options): + if issubclass(cpu_cls, m5.objects.DerivO3CPU): + # Assign the same file name to all cpus for now. + if options.needsTSO==None or options.scheme==None: + fatal("Need to provide needsTSO and scheme " + "to run simulation with DerivO3CPU") + + print("**********") + print("info: Configure for DerivO3CPU. needsTSO=%d; scheme=%s"\ + % (options.needsTSO, options.scheme)) + print("**********") + for cpu in cpu_list: + if options.needsTSO: + cpu.needsTSO = True + else: + cpu.needsTSO = False + + if options.allowSpecBuffHit: + cpu.allowSpecBuffHit = True + else: + cpu.allowSpecBuffHit = False + if len(options.scheme)!=0: + cpu.simulateScheme = options.scheme + else: + print("not DerivO3CPU") + + + def config_etrace(cpu_cls, cpu_list, options): if issubclass(cpu_cls, m5.objects.DerivO3CPU): # Assign the same file name to all cpus for now. This must be |