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authorAndreas Sandberg <andreas@sandberg.pp.se>2013-09-30 12:20:53 +0200
committerAndreas Sandberg <andreas@sandberg.pp.se>2013-09-30 12:20:53 +0200
commitfec2dea5c35d830ab4f4dc5295e6dba0e152f18e (patch)
treed3304bcc3a5d3d7684df0107982077714200535f /configs/common/FSConfig.py
parentd9856f33a455b9c86b90f5857df866fba3aa5bfb (diff)
downloadgem5-fec2dea5c35d830ab4f4dc5295e6dba0e152f18e.tar.xz
x86: Add support for m5ops through a memory mapped interface
In order to support m5ops in virtualized environments, we need to use a memory mapped interface. This changeset adds support for that by reserving 0xFFFF0000-0xFFFFFFFF and mapping those to the generic IPR interface for m5ops. The mapping is done in the X86ISA::TLB::finalizePhysical() which means that it just works for all of the CPU models, including virtualized ones.
Diffstat (limited to 'configs/common/FSConfig.py')
-rw-r--r--configs/common/FSConfig.py5
1 files changed, 4 insertions, 1 deletions
diff --git a/configs/common/FSConfig.py b/configs/common/FSConfig.py
index c971ba4cf..742aaca2d 100644
--- a/configs/common/FSConfig.py
+++ b/configs/common/FSConfig.py
@@ -509,7 +509,10 @@ def makeLinuxX86System(mem_mode, numCPUs = 1, mdesc = None,
# Mark the rest as available
X86E820Entry(addr = 0x100000,
size = '%dB' % (phys_mem_size - 0x100000),
- range_type = 1)
+ range_type = 1),
+ # Reserve the last 16kB of the 32-bit address space for the
+ # m5op interface
+ X86E820Entry(addr=0xFFFF0000, size='64kB', range_type=2),
]
# Command line