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authorNilay Vaish <nilay@cs.wisc.edu>2014-11-06 05:42:21 -0600
committerNilay Vaish <nilay@cs.wisc.edu>2014-11-06 05:42:21 -0600
commit3022d463fbe1f969aadf7284ade996539c9454f9 (patch)
tree7cd252e05ba750a4abe282db2d53957189e19173 /configs/common/MemConfig.py
parent68ddfab8a4fa6f56c5f8bff6d91facd39abe353b (diff)
downloadgem5-3022d463fbe1f969aadf7284ade996539c9454f9.tar.xz
ruby: interface with classic memory controller
This patch is the final in the series. The whole series and this patch in particular were written with the aim of interfacing ruby's directory controller with the memory controller in the classic memory system. This is being done since ruby's memory controller has not being kept up to date with the changes going on in DRAMs. Classic's memory controller is more up to date and supports multiple different types of DRAM. This also brings classic and ruby ever more close. The patch also changes ruby's memory controller to expose the same interface.
Diffstat (limited to 'configs/common/MemConfig.py')
-rw-r--r--configs/common/MemConfig.py3
1 files changed, 2 insertions, 1 deletions
diff --git a/configs/common/MemConfig.py b/configs/common/MemConfig.py
index d203118aa..57066426f 100644
--- a/configs/common/MemConfig.py
+++ b/configs/common/MemConfig.py
@@ -54,7 +54,8 @@ _mem_aliases_all = [
("lpddr2_s4_1066_x32", "LPDDR2_S4_1066_x32"),
("lpddr3_1600_x32", "LPDDR3_1600_x32"),
("wio_200_x128", "WideIO_200_x128"),
- ("dramsim2", "DRAMSim2")
+ ("dramsim2", "DRAMSim2"),
+ ("ruby_memory", "RubyMemoryControl")
]
# Filtered list of aliases. Only aliases for existing memory