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author | Mrinmoy Ghosh <mrinmoy.ghosh@arm.com> | 2012-02-12 16:07:38 -0600 |
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committer | Mrinmoy Ghosh <mrinmoy.ghosh@arm.com> | 2012-02-12 16:07:38 -0600 |
commit | 7e104a1af235823e3d641a972ea920937f7ec67d (patch) | |
tree | d109d98f09652ed11b08dfe0d93a531b28d14df7 /configs/common/O3_ARM_v7a.py | |
parent | b7cf64398f16e93f118060bd49313f1d37f0e324 (diff) | |
download | gem5-7e104a1af235823e3d641a972ea920937f7ec67d.tar.xz |
prefetcher: Make prefetcher a sim object instead of it being a parameter on cache
Diffstat (limited to 'configs/common/O3_ARM_v7a.py')
-rw-r--r-- | configs/common/O3_ARM_v7a.py | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/configs/common/O3_ARM_v7a.py b/configs/common/O3_ARM_v7a.py index a2b769f27..68fb0c543 100644 --- a/configs/common/O3_ARM_v7a.py +++ b/configs/common/O3_ARM_v7a.py @@ -190,10 +190,7 @@ class O3_ARM_v7aL2(BaseCache): size = '1MB' assoc = 16 write_buffers = 8 - # Simple stride prefetcher - prefetch_policy = 'stride' prefetch_on_access = 'true' - prefetch_latency = '1.0ns' - prefetch_degree = 8 - + # Simple stride prefetcher + prefetcher = StridePrefetcher(degree=8, latency='1.0ns') |