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authorAndreas Hansson <andreas.hansson@arm.com>2016-02-10 04:08:24 -0500
committerAndreas Hansson <andreas.hansson@arm.com>2016-02-10 04:08:24 -0500
commitfbdeb6031664d71e19a25f51b6ee882d803dac30 (patch)
tree0a3fa9a980e9b9a1013b3aff37080b045192b650 /configs/common/O3_ARM_v7a.py
parentbead7f249a71f8b15ae92b0df9822abb52ca7323 (diff)
downloadgem5-fbdeb6031664d71e19a25f51b6ee882d803dac30.tar.xz
mem: Deduce if cache should forward snoops
This patch changes how the cache determines if snoops should be forwarded from the memory side to the CPU side. Instead of having a parameter, the cache now looks at the port connected on the CPU side, and if it is a snooping port, then snoops are forwarded. Less error prone, and less parameters to worry about. The patch also tidies up the CPU classes to ensure that their I-side port is not snooping by removing overrides to the snoop request handler, such that snoop requests will panic via the default MasterPort implement
Diffstat (limited to 'configs/common/O3_ARM_v7a.py')
-rw-r--r--configs/common/O3_ARM_v7a.py2
1 files changed, 0 insertions, 2 deletions
diff --git a/configs/common/O3_ARM_v7a.py b/configs/common/O3_ARM_v7a.py
index 103158290..a38273c10 100644
--- a/configs/common/O3_ARM_v7a.py
+++ b/configs/common/O3_ARM_v7a.py
@@ -149,7 +149,6 @@ class O3_ARM_v7a_ICache(Cache):
tgts_per_mshr = 8
size = '32kB'
assoc = 2
- forward_snoops = False
is_read_only = True
# Writeback clean lines as well
writeback_clean = True
@@ -176,7 +175,6 @@ class O3_ARM_v7aWalkCache(Cache):
size = '1kB'
assoc = 8
write_buffers = 16
- forward_snoops = False
is_read_only = True
# Writeback clean lines as well
writeback_clean = True