summaryrefslogtreecommitdiff
path: root/configs/common/Options.py
diff options
context:
space:
mode:
authorDam Sunwoo <dam.sunwoo@arm.com>2013-04-22 13:20:31 -0400
committerDam Sunwoo <dam.sunwoo@arm.com>2013-04-22 13:20:31 -0400
commit2c1e34431326381833de289b1d90f2427ba16c98 (patch)
tree2f1b7a0e9a400d5b5d660b4386d4b993cbd0e31c /configs/common/Options.py
parent121b15a54da77ef77e98ff59621e1c5b0f1f1f52 (diff)
downloadgem5-2c1e34431326381833de289b1d90f2427ba16c98.tar.xz
cpu: generate SimPoint basic block vector profiles
This patch is based on http://reviews.m5sim.org/r/1474/ originally written by Mitch Hayenga. Basic block vectors are generated (simpoint.bb.gz in simout folder) based on start and end addresses of basic blocks. Some comments to the original patch are addressed and hooks are added to create and resume from checkpoints based on instruction counts dictated by external SimPoint analysis tools. SimPoint creation/resuming options will be implemented as a separate patch.
Diffstat (limited to 'configs/common/Options.py')
-rw-r--r--configs/common/Options.py4
1 files changed, 4 insertions, 0 deletions
diff --git a/configs/common/Options.py b/configs/common/Options.py
index 0c651b501..474da94f4 100644
--- a/configs/common/Options.py
+++ b/configs/common/Options.py
@@ -50,6 +50,10 @@ def addCommonOptions(parser):
parser.add_option("--caches", action="store_true")
parser.add_option("--l2cache", action="store_true")
parser.add_option("--fastmem", action="store_true")
+ parser.add_option("--simpoint-profile", action="store_true",
+ help="Enable basic block profiling for SimPoints")
+ parser.add_option("--simpoint-interval", type="int", default=10000000,
+ help="SimPoint interval in num of instructions")
parser.add_option("--clock", action="store", type="string", default='2GHz')
parser.add_option("--num-dirs", type="int", default=1)
parser.add_option("--num-l2caches", type="int", default=1)