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author | Andreas Sandberg <Andreas.Sandberg@ARM.com> | 2013-02-15 17:40:08 -0500 |
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committer | Andreas Sandberg <Andreas.Sandberg@ARM.com> | 2013-02-15 17:40:08 -0500 |
commit | e5dca84c3f15c63fe19195510d342458402a0716 (patch) | |
tree | 6ec39ac06144a2a4113c6dd12d75014cf1c92a62 /configs/common/Simulation.py | |
parent | e9f66dceac5ce2665001f9f74222964ef0aef74b (diff) | |
download | gem5-e5dca84c3f15c63fe19195510d342458402a0716.tar.xz |
config: Move CPU handover logic to m5.switchCpus()
CPU switching consists of the following steps:
1. Drain the system
2. Switch out old CPUs (cpu.switchOut())
3. Change the system timing mode to the mode the new CPUs require
4. Flush caches if switching to hardware virtualization
5. Inform new CPUs of the handover (cpu.takeOverFrom())
6. Resume the system
m5.switchCpus() previously only did step 2 & 5. Since information
about the new processors' memory system requirements is now exposed,
do all of the steps above.
This patch adds automatic memory system switching and flush (if
needed) to switchCpus(). Additionally, it adds optional draining to
switchCpus(). This has the following implications:
* changeToTiming and changeToAtomic are no longer needed, so they have
been removed.
* changeMemoryMode is only used internally, so it is has been renamed
to be private.
* switchCpus requires a reference to the system containing the CPUs as
its first parameter.
WARNING: This changeset breaks compatibility with existing
configuration scripts since it changes the signature of
m5.switchCpus().
Diffstat (limited to 'configs/common/Simulation.py')
-rw-r--r-- | configs/common/Simulation.py | 19 |
1 files changed, 3 insertions, 16 deletions
diff --git a/configs/common/Simulation.py b/configs/common/Simulation.py index d678c57a0..6f0e3cee0 100644 --- a/configs/common/Simulation.py +++ b/configs/common/Simulation.py @@ -242,10 +242,7 @@ def repeatSwitch(testsys, repeat_switch_cpu_list, maxtick, switch_freq): if exit_cause != "simulate() limit reached": return exit_event - print "draining the system" - m5.drain(testsys) - m5.switchCpus(repeat_switch_cpu_list) - m5.resume(testsys) + m5.switchCpus(testsys, repeat_switch_cpu_list) tmp_cpu_list = [] for old_cpu, new_cpu in repeat_switch_cpu_list: @@ -436,15 +433,7 @@ def run(options, root, testsys, cpu_class): exit_event = m5.simulate(10000) print "Switched CPUS @ tick %s" % (m5.curTick()) - # when you change to Timing (or Atomic), you halt the system - # given as argument. When you are finished with the system - # changes (including switchCpus), you must resume the system - # manually. You DON'T need to resume after just switching - # CPUs if you haven't changed anything on the system level. - - m5.changeToTiming(testsys) - m5.switchCpus(switch_cpu_list) - m5.resume(testsys) + m5.switchCpus(testsys, switch_cpu_list) if options.standard_switch: print "Switch at instruction count:%d" % \ @@ -458,9 +447,7 @@ def run(options, root, testsys, cpu_class): print "Switching CPUS @ tick %s" % (m5.curTick()) print "Simulation ends instruction count:%d" % \ (testsys.switch_cpus_1[0].max_insts_any_thread) - m5.drain(testsys) - m5.switchCpus(switch_cpu_list1) - m5.resume(testsys) + m5.switchCpus(testsys, switch_cpu_list1) # If we're taking and restoring checkpoints, use checkpoint_dir # option only for finding the checkpoints to restore from. This |