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| author | Ali Saidi <Ali.Saidi@ARM.com> | 2011-12-01 00:15:22 -0800 |
|---|---|---|
| committer | Ali Saidi <Ali.Saidi@ARM.com> | 2011-12-01 00:15:22 -0800 |
| commit | 946f7f0f55215d0eefe29fed2e4c123e23b9848f (patch) | |
| tree | 312ff2a3a263cd79e700c8ef3e6a85ddd5ff8884 /configs/common/cpu2000.py | |
| parent | 5901c5223f2e9280aa6f2307288b6a5dc554df83 (diff) | |
| download | gem5-946f7f0f55215d0eefe29fed2e4c123e23b9848f.tar.xz | |
ARM: Add support for having a TLB cache.
--HG--
extra : rebase_source : 7a5780ab74d7c294682738c7ccb3ce8d56c6fd63
Diffstat (limited to 'configs/common/cpu2000.py')
0 files changed, 0 insertions, 0 deletions