config: Switch from the print statement to the print function.

Change-Id: I701fa58cfcfa2767ce9ad24da314a053889878d0
Reviewed-on: https://gem5-review.googlesource.com/8762
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Gabe Black <gabeblack@google.com>

10 files changed, 86 insertions, 64 deletions

diff --git a/configs/common/Benchmarks.py b/configs/common/Benchmarks.py
index dec1e3e84..b7d10b563 100644
--- a/configs/common/Benchmarks.py
+++ b/configs/common/Benchmarks.py
@@ -26,6 +26,8 @@
 #
 # Authors: Ali Saidi
 
+from __future__ import print_function
+
 from SysPaths import script, disk, binary
 from os import environ as env
 from m5.defines import buildEnv
@@ -63,8 +65,8 @@ class SysConfig:
         elif buildEnv['TARGET_ISA'] == 'sparc':
             return env.get('LINUX_IMAGE', disk('disk.s10hw2'))
         else:
-            print "Don't know what default disk image to use for %s ISA" % \
-                buildEnv['TARGET_ISA']
+            print("Don't know what default disk image to use for %s ISA" %
+                buildEnv['TARGET_ISA'])
             exit(1)
 
     def rootdev(self):
diff --git a/configs/common/CacheConfig.py b/configs/common/CacheConfig.py
index a0a18a3aa..3fa3676b0 100644
--- a/configs/common/CacheConfig.py
+++ b/configs/common/CacheConfig.py
@@ -41,13 +41,15 @@
 # Configure the M5 cache hierarchy config in one place
 #
 
+from __future__ import print_function
+
 import m5
 from m5.objects import *
 from Caches import *
 
 def config_cache(options, system):
     if options.external_memory_system and (options.caches or options.l2cache):
-        print "External caches and internal caches are exclusive options.\n"
+        print("External caches and internal caches are exclusive options.\n")
         sys.exit(1)
 
     if options.external_memory_system:
@@ -57,7 +59,7 @@ def config_cache(options, system):
         try:
             from cores.arm.O3_ARM_v7a import *
         except:
-            print "O3_ARM_v7a_3 is unavailable. Did you compile the O3 model?"
+            print("O3_ARM_v7a_3 is unavailable. Did you compile the O3 model?")
             sys.exit(1)
 
         dcache_class, icache_class, l2_cache_class, walk_cache_class = \
diff --git a/configs/common/CpuConfig.py b/configs/common/CpuConfig.py
index 327c4318d..3f193ae60 100644
--- a/configs/common/CpuConfig.py
+++ b/configs/common/CpuConfig.py
@@ -35,6 +35,8 @@
 #
 # Authors: Andreas Sandberg
 
+from __future__ import print_function
+
 from m5 import fatal
 import m5.objects
 import inspect
@@ -64,23 +66,23 @@ def get(name):
         cpu_class = _cpu_classes[name]
         return cpu_class
     except KeyError:
-        print "%s is not a valid CPU model." % (name,)
+        print("%s is not a valid CPU model." % (name,))
         sys.exit(1)
 
 def print_cpu_list():
     """Print a list of available CPU classes including their aliases."""
 
-    print "Available CPU classes:"
+    print("Available CPU classes:")
     doc_wrapper = TextWrapper(initial_indent="\t\t", subsequent_indent="\t\t")
     for name, cls in _cpu_classes.items():
-        print "\t%s" % name
+        print("\t%s" % name)
 
         # Try to extract the class documentation from the class help
         # string.
         doc = inspect.getdoc(cls)
         if doc:
             for line in doc_wrapper.wrap(doc):
-                print line
+                print(line)
 
 def cpu_names():
     """Return a list of valid CPU names."""
diff --git a/configs/common/FSConfig.py b/configs/common/FSConfig.py
index fc8765b6c..42cfafed4 100644
--- a/configs/common/FSConfig.py
+++ b/configs/common/FSConfig.py
@@ -39,6 +39,8 @@
 #
 # Authors: Kevin Lim
 
+from __future__ import print_function
+
 from m5.objects import *
 from Benchmarks import *
 from m5.util import *
@@ -259,7 +261,8 @@ def makeArmSystem(mem_mode, machine_type, num_cpus=1, mdesc=None,
 
     if isinstance(self.realview, VExpress_EMM64):
         if os.path.split(mdesc.disk())[-1] == 'linux-aarch32-ael.img':
-            print "Selected 64-bit ARM architecture, updating default disk image..."
+            print("Selected 64-bit ARM architecture, updating default "
+                  "disk image...")
             mdesc.diskname = 'linaro-minimal-aarch64.img'
 
 
diff --git a/configs/common/GPUTLBConfig.py b/configs/common/GPUTLBConfig.py
index b7ea6dcf1..00746ce31 100644
--- a/configs/common/GPUTLBConfig.py
+++ b/configs/common/GPUTLBConfig.py
@@ -33,6 +33,8 @@
 #  Author: Lisa Hsu
 #
 
+from __future__ import print_function
+
 # Configure the TLB hierarchy
 # Places which would probably need to be modified if you
 # want a different hierarchy are specified by a <Modify here .. >'
@@ -88,7 +90,7 @@ def config_tlb_hierarchy(options, system, shader_idx):
     elif options.TLB_config == "2CU":
         num_TLBs = n_cu >> 1
     else:
-        print "Bad option for TLB Configuration."
+        print("Bad option for TLB Configuration.")
         sys.exit(1)
 
     #----------------------------------------------------------------------------------------
diff --git a/configs/common/MemConfig.py b/configs/common/MemConfig.py
index 475bbeb32..36035800f 100644
--- a/configs/common/MemConfig.py
+++ b/configs/common/MemConfig.py
@@ -36,6 +36,8 @@
 # Authors: Andreas Sandberg
 #          Andreas Hansson
 
+from __future__ import print_function
+
 import m5.objects
 import inspect
 import sys
@@ -64,23 +66,23 @@ def get(name):
         mem_class = _mem_classes[name]
         return mem_class
     except KeyError:
-        print "%s is not a valid memory controller." % (name,)
+        print("%s is not a valid memory controller." % (name,))
         sys.exit(1)
 
 def print_mem_list():
     """Print a list of available memory classes."""
 
-    print "Available memory classes:"
+    print("Available memory classes:")
     doc_wrapper = TextWrapper(initial_indent="\t\t", subsequent_indent="\t\t")
     for name, cls in _mem_classes.items():
-        print "\t%s" % name
+        print("\t%s" % name)
 
         # Try to extract the class documentation from the class help
         # string.
         doc = inspect.getdoc(cls)
         if doc:
             for line in doc_wrapper.wrap(doc):
-                print line
+                print(line)
 
 def mem_names():
     """Return a list of valid memory names."""
@@ -223,8 +225,8 @@ def config_mem(options, system):
 
             if opt_elastic_trace_en:
                 mem_ctrl.latency = '1ns'
-                print "For elastic trace, over-riding Simple Memory " \
-                    "latency to 1ns."
+                print("For elastic trace, over-riding Simple Memory "
+                    "latency to 1ns.")
 
             mem_ctrls.append(mem_ctrl)
 
diff --git a/configs/common/PlatformConfig.py b/configs/common/PlatformConfig.py
index e2589c058..34325f315 100644
--- a/configs/common/PlatformConfig.py
+++ b/configs/common/PlatformConfig.py
@@ -38,6 +38,8 @@
 # Authors: Andreas Sandberg
 #          Pierre-Yves Peneau
 
+from __future__ import print_function
+
 import m5.objects
 import inspect
 import sys
@@ -83,22 +85,22 @@ def get(name):
 def print_platform_list():
     """Print a list of available Platform classes including their aliases."""
 
-    print "Available Platform classes:"
+    print("Available Platform classes:")
     doc_wrapper = TextWrapper(initial_indent="\t\t", subsequent_indent="\t\t")
     for name, cls in _platform_classes.items():
-        print "\t%s" % name
+        print("\t%s" % name)
 
         # Try to extract the class documentation from the class help
         # string.
         doc = inspect.getdoc(cls)
         if doc:
             for line in doc_wrapper.wrap(doc):
-                print line
+                print(line)
 
     if _platform_aliases:
-        print "\Platform aliases:"
+        print("\Platform aliases:")
         for alias, target in _platform_aliases.items():
-            print "\t%s => %s" % (alias, target)
+            print("\t%s => %s" % (alias, target))
 
 def platform_names():
     """Return a list of valid Platform names."""
diff --git a/configs/common/Simulation.py b/configs/common/Simulation.py
index 7c949b972..6df90cb6c 100644
--- a/configs/common/Simulation.py
+++ b/configs/common/Simulation.py
@@ -39,6 +39,8 @@
 #
 # Authors: Lisa Hsu
 
+from __future__ import print_function
+
 import sys
 from os import getcwd
 from os.path import join as joinpath
@@ -170,7 +172,7 @@ def findCptDir(options, cptdir, testsys):
             weight_inst = float(match.group(3))
             interval_length = int(match.group(4))
             warmup_length = int(match.group(5))
-        print "Resuming from", checkpoint_dir
+        print("Resuming from", checkpoint_dir)
         simpoint_start_insts = []
         simpoint_start_insts.append(warmup_length)
         simpoint_start_insts.append(warmup_length + interval_length)
@@ -178,9 +180,9 @@ def findCptDir(options, cptdir, testsys):
         if testsys.switch_cpus != None:
             testsys.switch_cpus[0].simpoint_start_insts = simpoint_start_insts
 
-        print "Resuming from SimPoint",
-        print "#%d, start_inst:%d, weight:%f, interval:%d, warmup:%d" % \
-            (index, start_inst, weight_inst, interval_length, warmup_length)
+        print("Resuming from SimPoint", end=' ')
+        print("#%d, start_inst:%d, weight:%f, interval:%d, warmup:%d" %
+            (index, start_inst, weight_inst, interval_length, warmup_length))
 
     else:
         dirs = listdir(cptdir)
@@ -210,10 +212,10 @@ def scriptCheckpoints(options, maxtick, cptdir):
         if options.checkpoint_restore != None:
             checkpoint_inst += options.checkpoint_restore
 
-        print "Creating checkpoint at inst:%d" % (checkpoint_inst)
+        print("Creating checkpoint at inst:%d" % (checkpoint_inst))
         exit_event = m5.simulate()
         exit_cause = exit_event.getCause()
-        print "exit cause = %s" % exit_cause
+        print("exit cause = %s" % exit_cause)
 
         # skip checkpoint instructions should they exist
         while exit_cause == "checkpoint":
@@ -223,7 +225,7 @@ def scriptCheckpoints(options, maxtick, cptdir):
         if exit_cause == "a thread reached the max instruction count":
             m5.checkpoint(joinpath(cptdir, "cpt.%s.%d" % \
                     (options.bench, checkpoint_inst)))
-            print "Checkpoint written."
+            print("Checkpoint written.")
 
     else:
         when, period = options.take_checkpoints.split(",", 1)
@@ -288,10 +290,10 @@ def parseSimpointAnalysisFile(options, testsys):
 
     simpoint_filename, weight_filename, interval_length, warmup_length = \
         options.take_simpoint_checkpoints.split(",", 3)
-    print "simpoint analysis file:", simpoint_filename
-    print "simpoint weight file:", weight_filename
-    print "interval length:", interval_length
-    print "warmup length:", warmup_length
+    print("simpoint analysis file:", simpoint_filename)
+    print("simpoint weight file:", weight_filename)
+    print("interval length:", interval_length)
+    print("warmup length:", warmup_length)
 
     interval_length = int(interval_length)
     warmup_length = int(warmup_length)
@@ -339,11 +341,11 @@ def parseSimpointAnalysisFile(options, testsys):
     simpoints.sort(key=lambda obj: obj[2])
     for s in simpoints:
         interval, weight, starting_inst_count, actual_warmup_length = s
-        print str(interval), str(weight), starting_inst_count, \
-            actual_warmup_length
+        print(str(interval), str(weight), starting_inst_count,
+            actual_warmup_length)
         simpoint_start_insts.append(starting_inst_count)
 
-    print "Total # of simpoints:", len(simpoints)
+    print("Total # of simpoints:", len(simpoints))
     testsys.cpu[0].simpoint_start_insts = simpoint_start_insts
 
     return (simpoints, interval_length)
@@ -364,7 +366,7 @@ def takeSimpointCheckpoints(simpoints, interval_length, cptdir):
 
             # skip checkpoint instructions should they exist
             while exit_event.getCause() == "checkpoint":
-                print "Found 'checkpoint' exit event...ignoring..."
+                print("Found 'checkpoint' exit event...ignoring...")
                 exit_event = m5.simulate()
 
             exit_cause = exit_event.getCause()
@@ -375,16 +377,16 @@ def takeSimpointCheckpoints(simpoints, interval_length, cptdir):
                 "cpt.simpoint_%02d_inst_%d_weight_%f_interval_%d_warmup_%d"
                 % (index, starting_inst_count, weight, interval_length,
                 actual_warmup_length)))
-            print "Checkpoint #%d written. start inst:%d weight:%f" % \
-                (num_checkpoints, starting_inst_count, weight)
+            print("Checkpoint #%d written. start inst:%d weight:%f" %
+                (num_checkpoints, starting_inst_count, weight))
             num_checkpoints += 1
             last_chkpnt_inst_count = starting_inst_count
         else:
             break
         index += 1
 
-    print 'Exiting @ tick %i because %s' % (m5.curTick(), exit_cause)
-    print "%d checkpoints taken" % num_checkpoints
+    print('Exiting @ tick %i because %s' % (m5.curTick(), exit_cause))
+    print("%d checkpoints taken" % num_checkpoints)
     sys.exit(code)
 
 def restoreSimpointCheckpoint():
@@ -392,7 +394,7 @@ def restoreSimpointCheckpoint():
     exit_cause = exit_event.getCause()
 
     if exit_cause == "simpoint starting point found":
-        print "Warmed up! Dumping and resetting stats!"
+        print("Warmed up! Dumping and resetting stats!")
         m5.stats.dump()
         m5.stats.reset()
 
@@ -400,14 +402,14 @@ def restoreSimpointCheckpoint():
         exit_cause = exit_event.getCause()
 
         if exit_cause == "simpoint starting point found":
-            print "Done running SimPoint!"
+            print("Done running SimPoint!")
             sys.exit(exit_event.getCode())
 
-    print 'Exiting @ tick %i because %s' % (m5.curTick(), exit_cause)
+    print('Exiting @ tick %i because %s' % (m5.curTick(), exit_cause))
     sys.exit(exit_event.getCode())
 
 def repeatSwitch(testsys, repeat_switch_cpu_list, maxtick, switch_freq):
-    print "starting switch loop"
+    print("starting switch loop")
     while True:
         exit_event = m5.simulate(switch_freq)
         exit_cause = exit_event.getCause()
@@ -489,10 +491,10 @@ def run(options, root, testsys, cpu_class):
         switch_class = getCPUClass(options.cpu_type)[0]
         if switch_class.require_caches() and \
                 not options.caches:
-            print "%s: Must be used with caches" % str(switch_class)
+            print("%s: Must be used with caches" % str(switch_class))
             sys.exit(1)
         if not switch_class.support_take_over():
-            print "%s: CPU switching not supported" % str(switch_class)
+            print("%s: CPU switching not supported" % str(switch_class))
             sys.exit(1)
 
         repeat_switch_cpus = [switch_class(switched_out=True, \
@@ -641,32 +643,32 @@ def run(options, root, testsys, cpu_class):
 
     if options.standard_switch or cpu_class:
         if options.standard_switch:
-            print "Switch at instruction count:%s" % \
-                    str(testsys.cpu[0].max_insts_any_thread)
+            print("Switch at instruction count:%s" %
+                    str(testsys.cpu[0].max_insts_any_thread))
             exit_event = m5.simulate()
         elif cpu_class and options.fast_forward:
-            print "Switch at instruction count:%s" % \
-                    str(testsys.cpu[0].max_insts_any_thread)
+            print("Switch at instruction count:%s" %
+                    str(testsys.cpu[0].max_insts_any_thread))
             exit_event = m5.simulate()
         else:
-            print "Switch at curTick count:%s" % str(10000)
+            print("Switch at curTick count:%s" % str(10000))
             exit_event = m5.simulate(10000)
-        print "Switched CPUS @ tick %s" % (m5.curTick())
+        print("Switched CPUS @ tick %s" % (m5.curTick()))
 
         m5.switchCpus(testsys, switch_cpu_list)
 
         if options.standard_switch:
-            print "Switch at instruction count:%d" % \
-                    (testsys.switch_cpus[0].max_insts_any_thread)
+            print("Switch at instruction count:%d" %
+                    (testsys.switch_cpus[0].max_insts_any_thread))
 
             #warmup instruction count may have already been set
             if options.warmup_insts:
                 exit_event = m5.simulate()
             else:
                 exit_event = m5.simulate(options.standard_switch)
-            print "Switching CPUS @ tick %s" % (m5.curTick())
-            print "Simulation ends instruction count:%d" % \
-                    (testsys.switch_cpus_1[0].max_insts_any_thread)
+            print("Switching CPUS @ tick %s" % (m5.curTick()))
+            print("Simulation ends instruction count:%d" %
+                    (testsys.switch_cpus_1[0].max_insts_any_thread))
             m5.switchCpus(testsys, switch_cpu_list1)
 
     # If we're taking and restoring checkpoints, use checkpoint_dir
@@ -699,7 +701,7 @@ def run(options, root, testsys, cpu_class):
     else:
         if options.fast_forward:
             m5.stats.reset()
-        print "**** REAL SIMULATION ****"
+        print("**** REAL SIMULATION ****")
 
         # If checkpoints are being taken, then the checkpoint instruction
         # will occur in the benchmark code it self.
@@ -709,7 +711,8 @@ def run(options, root, testsys, cpu_class):
         else:
             exit_event = benchCheckpoints(options, maxtick, cptdir)
 
-    print 'Exiting @ tick %i because %s' % (m5.curTick(), exit_event.getCause())
+    print('Exiting @ tick %i because %s' %
+          (m5.curTick(), exit_event.getCause()))
     if options.checkpoint_at_end:
         m5.checkpoint(joinpath(cptdir, "cpt.%d"))
 
diff --git a/configs/common/cores/arm/HPI.py b/configs/common/cores/arm/HPI.py
index 03bad24c6..a6f77af7f 100644
--- a/configs/common/cores/arm/HPI.py
+++ b/configs/common/cores/arm/HPI.py
@@ -45,6 +45,8 @@ at: http://www.arm.com/ResearchEnablement/SystemModeling
 
 """
 
+from __future__ import print_function
+
 from m5.objects import *
 
 # Simple function to allow a string of [01x_] to be converted into a
@@ -71,7 +73,7 @@ def make_implicant(implicant_string):
         elif char == 'x':
             pass
         else:
-            print "Can't parse implicant character", char
+            print("Can't parse implicant character", char)
 
     return (ret_mask, ret_match)
 
@@ -133,7 +135,7 @@ def ref(name):
             ret = TimingExprRef()
             ret.index = env[name]
         else:
-            print "Invalid expression name", name
+            print("Invalid expression name", name)
             ret = TimingExprNull()
         return ret
     return body
diff --git a/configs/common/cpu2000.py b/configs/common/cpu2000.py
index 3d01fe9da..da87507d9 100644
--- a/configs/common/cpu2000.py
+++ b/configs/common/cpu2000.py
@@ -26,6 +26,8 @@
 #
 # Authors: Nathan Binkert
 
+from __future__ import print_function
+
 import os
 import sys
 from os.path import basename, exists, join as joinpath, normpath
@@ -747,8 +749,8 @@ if __name__ == '__main__':
     from pprint import pprint
     for bench in all:
         for input_set in 'ref', 'test', 'train':
-            print 'class: %s' % bench.__name__
+            print('class: %s' % bench.__name__)
             x = bench('alpha', 'tru64', input_set)
-            print '%s: %s' % (x, input_set)
+            print('%s: %s' % (x, input_set))
             pprint(x.makeProcessArgs())
-            print
+            print()