diff options
| author | Nilay Vaish ext:(%2C%20Timothy%20Jones%20%3Ctimothy.jones%40cl.cam.ac.uk%3E) <nilay@cs.wisc.edu> | 2013-01-24 12:28:51 -0600 |
|---|---|---|
| committer | Nilay Vaish ext:(%2C%20Timothy%20Jones%20%3Ctimothy.jones%40cl.cam.ac.uk%3E) <nilay@cs.wisc.edu> | 2013-01-24 12:28:51 -0600 |
| commit | dbeabedaf0f8d9ec0ea3331db2e44b1add53f79f (patch) | |
| tree | 568d3b6007adf1a8d3ba6568fc5635e56afd3d53 /configs/common | |
| parent | 11d5ffa108983d5d9742f0aad23f80c691f285ee (diff) | |
| download | gem5-dbeabedaf0f8d9ec0ea3331db2e44b1add53f79f.tar.xz | |
branch predictor: move out of o3 and inorder cpus
This patch moves the branch predictor files in the o3 and inorder directories
to src/cpu/pred. This allows sharing the branch predictor across different
cpu models.
This patch was originally posted by Timothy Jones in July 2010
but never made it to the repository.
--HG--
rename : src/cpu/o3/bpred_unit.cc => src/cpu/pred/bpred_unit.cc
rename : src/cpu/o3/bpred_unit.hh => src/cpu/pred/bpred_unit.hh
rename : src/cpu/o3/bpred_unit_impl.hh => src/cpu/pred/bpred_unit_impl.hh
rename : src/cpu/o3/sat_counter.hh => src/cpu/pred/sat_counter.hh
Diffstat (limited to 'configs/common')
| -rw-r--r-- | configs/common/O3_ARM_v7a.py | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/configs/common/O3_ARM_v7a.py b/configs/common/O3_ARM_v7a.py index f76128ae6..c85ba2c6c 100644 --- a/configs/common/O3_ARM_v7a.py +++ b/configs/common/O3_ARM_v7a.py @@ -87,8 +87,8 @@ class O3_ARM_v7a_FUP(FUPool): FUList = [O3_ARM_v7a_Simple_Int(), O3_ARM_v7a_Complex_Int(), O3_ARM_v7a_Load(), O3_ARM_v7a_Store(), O3_ARM_v7a_FP()] - -class O3_ARM_v7a_3(DerivO3CPU): +# Tournament Branch Predictor +class O3_ARM_v7a_BP(BranchPredictor): predType = "tournament" localCtrBits = 2 localHistoryTableSize = 64 @@ -102,6 +102,8 @@ class O3_ARM_v7a_3(DerivO3CPU): BTBTagSize = 18 RASSize = 16 instShiftAmt = 2 + +class O3_ARM_v7a_3(DerivO3CPU): LQEntries = 16 SQEntries = 16 LSQDepCheckShift = 0 @@ -142,6 +144,7 @@ class O3_ARM_v7a_3(DerivO3CPU): numROBEntries = 40 switched_out = False + branchPred = O3_ARM_v7a_BP() # Instruction Cache class O3_ARM_v7a_ICache(BaseCache): |