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author | Nikos Nikoleris <nikos.nikoleris@arm.com> | 2018-02-12 15:53:47 +0000 |
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committer | Nikos Nikoleris <nikos.nikoleris@arm.com> | 2018-03-20 21:41:45 +0000 |
commit | 68af229490fc811aebddf68b3e2e09e63a5fa475 (patch) | |
tree | 2a9a9cf0c94c2f490e78b30c2498460e535f3a39 /configs/common | |
parent | fe187de9bd1aa479ab6cd198522bfd118d0d50ec (diff) | |
download | gem5-68af229490fc811aebddf68b3e2e09e63a5fa475.tar.xz |
arch-arm, configs: Treat the bootloader rom as cacheable memory
Prior to this changeset the bootloader rom (instantiated as a
SimpleMemory) in ruby Arm systems was treated as an IO device and it
was fronted by a DMA controller. This changeset moves the bootloader
rom and adds it to the system as another memory with a dedicated
directory controller.
Change-Id: I094fed031cdef7f77a939d94f948d967b349b7e0
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/8741
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'configs/common')
-rw-r--r-- | configs/common/FSConfig.py | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/configs/common/FSConfig.py b/configs/common/FSConfig.py index 42cfafed4..17498c42b 100644 --- a/configs/common/FSConfig.py +++ b/configs/common/FSConfig.py @@ -1,4 +1,4 @@ -# Copyright (c) 2010-2012, 2015-2017 ARM Limited +# Copyright (c) 2010-2012, 2015-2018 ARM Limited # All rights reserved. # # The license below extends only to copyright in the software and shall @@ -326,8 +326,10 @@ def makeArmSystem(mem_mode, machine_type, num_cpus=1, mdesc=None, # iobus, as gem5's membus is only used for initialization and # SST doesn't use it. Attaching nvmem to iobus solves this issue. # During initialization, system_port -> membus -> iobus -> nvmem. - if external_memory or ruby: + if external_memory: self.realview.setupBootLoader(self.iobus, self, binary) + elif ruby: + self.realview.setupBootLoader(None, self, binary) else: self.realview.setupBootLoader(self.membus, self, binary) self.gic_cpu_addr = self.realview.gic.cpu_addr @@ -386,8 +388,6 @@ def makeArmSystem(mem_mode, machine_type, num_cpus=1, mdesc=None, elif ruby: self._dma_ports = [ ] self.realview.attachOnChipIO(self.iobus, dma_ports=self._dma_ports) - # Force Ruby to treat the boot ROM as an IO device. - self.realview.nvmem.in_addr_map = False self.realview.attachIO(self.iobus, dma_ports=self._dma_ports) else: self.realview.attachOnChipIO(self.membus, self.bridge) |