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authorGabe Black <gblack@eecs.umich.edu>2008-01-12 06:39:15 -0500
committerGabe Black <gblack@eecs.umich.edu>2008-01-12 06:39:15 -0500
commit223e48e6ae651e6e99bc1fbb58ec30d7f88a6e32 (patch)
treee6e61a26f42455b2d3011aeba7cd0477a45d5c22 /configs/common
parent0e394fdfa43ea3b50691402e1345e27ad6d011da (diff)
downloadgem5-223e48e6ae651e6e99bc1fbb58ec30d7f88a6e32.tar.xz
X86: Make the IO ports work using extra physical address lines. Add a serial port.
--HG-- extra : convert_revision : a14cb4fc9afedfc0ff58b11a7f8fb5516d462cc6
Diffstat (limited to 'configs/common')
-rw-r--r--configs/common/FSConfig.py21
1 files changed, 19 insertions, 2 deletions
diff --git a/configs/common/FSConfig.py b/configs/common/FSConfig.py
index 5b21dbb39..c8916841b 100644
--- a/configs/common/FSConfig.py
+++ b/configs/common/FSConfig.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2006-2007 The Regents of The University of Michigan
+# Copyright (c) 2006-2008 The Regents of The University of Michigan
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
@@ -155,6 +155,10 @@ def makeLinuxMipsSystem(mem_mode, mdesc = None):
return self
+def x86IOAddress(port):
+ IO_address_space_base = 0x1000000000000000
+ return IO_address_space_base + port;
+
def makeLinuxX86System(mem_mode, mdesc = None):
self = LinuxX86System()
if not mdesc:
@@ -163,10 +167,23 @@ def makeLinuxX86System(mem_mode, mdesc = None):
self.readfile = mdesc.script()
# Physical memory
- self.membus = Bus(bus_id=0)
+ self.membus = Bus(bus_id=1)
self.physmem = PhysicalMemory(range = AddrRange(mdesc.mem()))
self.physmem.port = self.membus.port
+ # North Bridge
+ self.iobus = Bus(bus_id=0)
+ self.bridge = Bridge(delay='50ns', nack_delay='4ns')
+ self.bridge.side_a = self.iobus.port
+ self.bridge.side_b = self.membus.port
+
+ # Serial port and console
+ self.console = SimConsole()
+ self.com_1 = Uart8250()
+ self.com_1.pio_addr = x86IOAddress(0x3f8)
+ self.com_1.pio = self.iobus.port
+ self.com_1.sim_console = self.console
+
# Platform
self.opteron = Opteron()