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author | Iru Cai <mytbk920423@gmail.com> | 2019-02-28 17:07:41 +0800 |
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committer | Iru Cai <mytbk920423@gmail.com> | 2019-03-20 17:32:17 +0800 |
commit | 4ae5807f3ca63fc457154f23fd8374b3a0faa603 (patch) | |
tree | f5e58e16e8e14d4b972129ba2d02a5189d8aaa4b /configs/common | |
parent | 32986563546481d9ac17280cd0aadb39b87b9817 (diff) | |
download | gem5-4ae5807f3ca63fc457154f23fd8374b3a0faa603.tar.xz |
invisispec-1.0 configs
Diffstat (limited to 'configs/common')
-rw-r--r-- | configs/common/Benchmarks.py | 6 | ||||
-rw-r--r-- | configs/common/CpuConfig.py | 29 | ||||
-rw-r--r-- | configs/common/FSConfig.py | 7 | ||||
-rw-r--r-- | configs/common/Options.py | 12 | ||||
-rw-r--r-- | configs/common/Simulation.py | 8 |
5 files changed, 55 insertions, 7 deletions
diff --git a/configs/common/Benchmarks.py b/configs/common/Benchmarks.py index b7d10b563..b362e42e4 100644 --- a/configs/common/Benchmarks.py +++ b/configs/common/Benchmarks.py @@ -51,17 +51,17 @@ class SysConfig: if self.memsize: return self.memsize else: - return '128MB' + return '512MB' def disk(self): if self.diskname: return disk(self.diskname) elif buildEnv['TARGET_ISA'] == 'alpha': - return env.get('LINUX_IMAGE', disk('linux-latest.img')) + return env.get('LINUX_IMAGE', disk('alpha-parsec.img')) elif buildEnv['TARGET_ISA'] == 'x86': return env.get('LINUX_IMAGE', disk('x86root.img')) elif buildEnv['TARGET_ISA'] == 'arm': - return env.get('LINUX_IMAGE', disk('linux-aarch32-ael.img')) + return env.get('LINUX_IMAGE', disk('aarch64-ubuntu-trusty-headless.img')) elif buildEnv['TARGET_ISA'] == 'sparc': return env.get('LINUX_IMAGE', disk('disk.s10hw2')) else: diff --git a/configs/common/CpuConfig.py b/configs/common/CpuConfig.py index f0d009e95..43539ee4d 100644 --- a/configs/common/CpuConfig.py +++ b/configs/common/CpuConfig.py @@ -100,6 +100,35 @@ def cpu_names(): """Return a list of valid CPU names.""" return _cpu_classes.keys() +# [InvisiSpec] add knob to configure the CPU modes/simulation schemes +def config_scheme(cpu_cls, cpu_list, options): + if issubclass(cpu_cls, m5.objects.DerivO3CPU): + # Assign the same file name to all cpus for now. + if options.needsTSO==None or options.scheme==None: + fatal("Need to provide needsTSO and scheme " + "to run simulation with DerivO3CPU") + + print("**********") + print("info: Configure for DerivO3CPU. needsTSO=%d; scheme=%s"\ + % (options.needsTSO, options.scheme)) + print("**********") + for cpu in cpu_list: + if options.needsTSO: + cpu.needsTSO = True + else: + cpu.needsTSO = False + + if options.allowSpecBuffHit: + cpu.allowSpecBuffHit = True + else: + cpu.allowSpecBuffHit = False + if len(options.scheme)!=0: + cpu.simulateScheme = options.scheme + else: + print("not DerivO3CPU") + + + def config_etrace(cpu_cls, cpu_list, options): if issubclass(cpu_cls, m5.objects.DerivO3CPU): # Assign the same file name to all cpus for now. This must be diff --git a/configs/common/FSConfig.py b/configs/common/FSConfig.py index 674761634..da3ceaf73 100644 --- a/configs/common/FSConfig.py +++ b/configs/common/FSConfig.py @@ -130,8 +130,8 @@ def makeLinuxAlphaSystem(mem_mode, mdesc=None, ruby=False, cmdline=None): self.intrctrl = IntrControl() self.mem_mode = mem_mode self.terminal = Terminal() - self.kernel = binary('vmlinux') - self.pal = binary('ts_osfpal') + self.kernel = binary('alpha-vmlinux_2.6.27') + self.pal = binary('tsb_osfpal') self.console = binary('console') if not cmdline: cmdline = 'root=/dev/hda1 console=ttyS0' @@ -676,7 +676,8 @@ def makeLinuxX86System(mem_mode, numCPUs=1, mdesc=None, Ruby=False, if not cmdline: cmdline = 'earlyprintk=ttyS0 console=ttyS0 lpj=7999923 root=/dev/hda1' self.boot_osflags = fillInCmdline(mdesc, cmdline) - self.kernel = binary('x86_64-vmlinux-2.6.22.9') + if self.kernel is None: + self.kernel = binary('x86_64-vmlinux-2.6.22.9') return self diff --git a/configs/common/Options.py b/configs/common/Options.py index c36dc384e..48fecac59 100644 --- a/configs/common/Options.py +++ b/configs/common/Options.py @@ -297,7 +297,17 @@ def addCommonOptions(parser): parser.add_option("--arm-iset", default="arm", type="choice", choices=["arm", "thumb", "aarch64"], help="ARM instruction set.") - + # [InvisiSpec] add options to configure needsTSO and scheme + parser.add_option("--scheme", default=None, action="store", type="choice", + choices=["UnsafeBaseline", "FuturisticSafeFence", + "SpectreSafeFence", "FuturisticSafeInvisibleSpec", + "SpectreSafeInvisibleSpec"], + help="choose baseline or defense designs to evaluate") + parser.add_option("--needsTSO", default=None, action="store", type="int", + help="Select TSO or RC. Set unzero to use TSO.") + parser.add_option("--allowSpecBuffHit", default=None, action="store", + type="int", + help="Allow to reuse spec buffer entries. Set unzero to reuse.") def addSEOptions(parser): # Benchmark options diff --git a/configs/common/Simulation.py b/configs/common/Simulation.py index 23a778397..e194b05dc 100644 --- a/configs/common/Simulation.py +++ b/configs/common/Simulation.py @@ -463,6 +463,14 @@ def run(options, root, testsys, cpu_class): switch_cpus = [cpu_class(switched_out=True, cpu_id=(i)) for i in xrange(np)] + # [InvisiSpec] configure simualtion scheme + if cpu_class == DerivO3CPU: + #fatal("Ruby can only be used with DerivO3CPU!") + CpuConfig.config_scheme(cpu_class, switch_cpus, options) + else: + warn("restoring from a checkpoint, " + "but not simulate using DerivO3CPU.") + for i in xrange(np): if options.fast_forward: testsys.cpu[i].max_insts_any_thread = int(options.fast_forward) |