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author | Andreas Hansson <andreas.hansson@arm.com> | 2013-05-30 12:53:54 -0400 |
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committer | Andreas Hansson <andreas.hansson@arm.com> | 2013-05-30 12:53:54 -0400 |
commit | 88aa7755f4f4ebd39a26fbece9c0d09cd195a010 (patch) | |
tree | ff24a9bb88a3cf810f3ffd40927290833879bdaa /configs/common | |
parent | cc8911261e11d67f2b8745289ed5ecbb89c9d917 (diff) | |
download | gem5-88aa7755f4f4ebd39a26fbece9c0d09cd195a010.tar.xz |
mem: Avoid explicitly zeroing the memory backing store
This patch removes the explicit memset as it is redundant and causes
the simulator to touch the entire space, forcing the host system to
allocate the pages.
Anonymous pages are mapped on the first access, and the page-fault
handler is responsible for zeroing them. Thus, the pages are still
zeroed, but we avoid touching the entire allocated space which enables
us to use much larger memory sizes as long as not all the memory is
actually used.
Diffstat (limited to 'configs/common')
-rw-r--r-- | configs/common/FSConfig.py | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/configs/common/FSConfig.py b/configs/common/FSConfig.py index 0d46dcde2..422de971e 100644 --- a/configs/common/FSConfig.py +++ b/configs/common/FSConfig.py @@ -180,10 +180,8 @@ def makeSparcSystem(mem_mode, MemClass, mdesc = None): self.t1000 = T1000() self.t1000.attachOnChipIO(self.membus) self.t1000.attachIO(self.iobus) - self.physmem = MemClass(range = AddrRange(Addr('1MB'), size = '64MB'), - zero = True) - self.physmem2 = MemClass(range = AddrRange(Addr('2GB'), size ='256MB'), - zero = True) + self.physmem = MemClass(range = AddrRange(Addr('1MB'), size = '64MB')) + self.physmem2 = MemClass(range = AddrRange(Addr('2GB'), size ='256MB')) self.mem_ranges = [self.physmem.range, self.physmem2.range] self.bridge.master = self.iobus.slave self.bridge.slave = self.membus.master @@ -275,8 +273,7 @@ def makeArmSystem(mem_mode, machine_type, MemClass, mdesc = None, if bare_metal: # EOT character on UART will end the simulation self.realview.uart.end_on_eot = True - self.physmem = MemClass(range = AddrRange(Addr(mdesc.mem())), - zero = True) + self.physmem = MemClass(range = AddrRange(Addr(mdesc.mem()))) self.mem_ranges = [self.physmem.range] else: self.kernel = binary('vmlinux.arm.smp.fb.2.6.38.8') |