summaryrefslogtreecommitdiff
path: root/configs/dram/sweep.py
diff options
context:
space:
mode:
authorAndreas Hansson <andreas.hansson@arm.com>2014-09-03 07:42:29 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2014-09-03 07:42:29 -0400
commit075640673963719b866e03b8ce311e221171fab6 (patch)
treef66f74d352ed85e46c26235ed0ad1c8b646e123b /configs/dram/sweep.py
parent77c28cc3956d32282f71d8eadbd5fff0fec836e8 (diff)
downloadgem5-075640673963719b866e03b8ce311e221171fab6.tar.xz
mem: Add utility script to plot DRAM efficiency sweep
This patch adds basic functionality to quickly visualise the output from the DRAM efficiency script. There are some unfortunate hacks needed to communicate the needed information from one script to the other, and we fall back on (ab)using the simout to do this. As part of this patch we also trim the efficiency sweep to stop at 512 bytes as this should be sufficient for all forseeable DRAMs.
Diffstat (limited to 'configs/dram/sweep.py')
-rw-r--r--configs/dram/sweep.py13
1 files changed, 10 insertions, 3 deletions
diff --git a/configs/dram/sweep.py b/configs/dram/sweep.py
index c1ee0ceca..9b7cfd35e 100644
--- a/configs/dram/sweep.py
+++ b/configs/dram/sweep.py
@@ -124,12 +124,16 @@ itt = system.mem_ctrls[0].tBURST.value * 1000000000000
# assume we start at 0
max_addr = mem_range.end
+# use min of the page size and 512 bytes as that should be more than
+# enough
+max_stride = min(512, page_size)
+
# now we create the state by iterating over the stride size from burst
-# size to min of the page size and 1 kB, and from using only a single
-# bank up to the number of banks available
+# size to the max stride, and from using only a single bank up to the
+# number of banks available
nxt_state = 0
for bank in range(1, nbr_banks + 1):
- for stride_size in range(burst_size, min(1024, page_size) + 1, burst_size):
+ for stride_size in range(burst_size, max_stride + 1, burst_size):
cfg_file.write("STATE %d %d DRAM 100 0 %d "
"%d %d %d %d %d %d %d %d 1\n" %
(nxt_state, period, max_addr, burst_size, itt, itt, 0,
@@ -168,3 +172,6 @@ root.system.mem_mode = 'timing'
m5.instantiate()
m5.simulate(nxt_state * period)
+
+print "DRAM sweep with burst: %d, banks: %d, max stride: %d" % \
+ (burst_size, nbr_banks, max_stride)