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| author | Andreas Hansson <andreas.hansson@arm.com> | 2015-11-22 05:10:17 -0500 |
|---|---|---|
| committer | Andreas Hansson <andreas.hansson@arm.com> | 2015-11-22 05:10:17 -0500 |
| commit | 6adb728fb4238992e5f07ca5db1f9c0aac30df6a (patch) | |
| tree | 35b7c00750125e62c676ef22cef995cd09c9e741 /configs/dram | |
| parent | 949437d559bcb0d40f6fe4fa81984a2467b7b52f (diff) | |
| download | gem5-6adb728fb4238992e5f07ca5db1f9c0aac30df6a.tar.xz | |
config: Minor fixes to the DRAM utilisation sweep
Diffstat (limited to 'configs/dram')
| -rw-r--r-- | configs/dram/sweep.py | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/configs/dram/sweep.py b/configs/dram/sweep.py index eb4c9b41e..8459f9d00 100644 --- a/configs/dram/sweep.py +++ b/configs/dram/sweep.py @@ -94,7 +94,7 @@ mem_range = AddrRange('256MB') system.mem_ranges = [mem_range] # do not worry about reserving space for the backing store -mmap_using_noreserve = True +system.mmap_using_noreserve = True # force a single channel to match the assumptions in the DRAM traffic # generator @@ -145,8 +145,8 @@ burst_size = int((system.mem_ctrls[0].devices_per_rank.value * page_size = system.mem_ctrls[0].devices_per_rank.value * \ system.mem_ctrls[0].device_rowbuffer_size.value -# match the maximum bandwidth of the memory, the parameter is in ns -# and we need it in ticks +# match the maximum bandwidth of the memory, the parameter is in seconds +# and we need it in ticks (ps) itt = system.mem_ctrls[0].tBURST.value * 1000000000000 # assume we start at 0 |