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authorKevin Lim <ktlim@umich.edu>2006-11-12 21:57:58 -0500
committerKevin Lim <ktlim@umich.edu>2006-11-12 21:57:58 -0500
commit3052632b68f842750c767caaf310fcbf116c559f (patch)
tree9b4b05c13e5e9c964659122e85fff46a14b5e88f /configs/example/fs.py
parentd2d44317528ffadf81fbb95c92291d8d2d4a2190 (diff)
parent437436a2f706477439cfb81d254e8f7b454450a5 (diff)
downloadgem5-3052632b68f842750c767caaf310fcbf116c559f.tar.xz
Merge ktlim@zamp:./local/clean/tmp/test-regress
into zamp.eecs.umich.edu:/z/ktlim2/clean/newmem-busfix --HG-- extra : convert_revision : b98236507bb8996ce605b48b5a5a6a7aac297dc5
Diffstat (limited to 'configs/example/fs.py')
-rw-r--r--configs/example/fs.py2
1 files changed, 1 insertions, 1 deletions
diff --git a/configs/example/fs.py b/configs/example/fs.py
index 180cd2719..a9f1d579a 100644
--- a/configs/example/fs.py
+++ b/configs/example/fs.py
@@ -95,7 +95,7 @@ test_sys = makeLinuxAlphaSystem(test_mem_mode, bm[0])
np = options.num_cpus
test_sys.cpu = [TestCPUClass(cpu_id=i) for i in xrange(np)]
for i in xrange(np):
- if options.caches and not options.standard_switch and not FutureClass:
+ if options.caches:
test_sys.cpu[i].addPrivateSplitL1Caches(L1Cache(size = '32kB'),
L1Cache(size = '64kB'))
test_sys.cpu[i].connectMemPorts(test_sys.membus)