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| author | Andreas Hansson <andreas.hansson@arm.com> | 2016-04-21 04:48:04 -0400 |
|---|---|---|
| committer | Andreas Hansson <andreas.hansson@arm.com> | 2016-04-21 04:48:04 -0400 |
| commit | 53d735b17ee1a3bd27173138ed1937a45f20bc12 (patch) | |
| tree | 49ddc591b8246f099d5d94a07177cbc6031e491e /configs/example/memcheck.py | |
| parent | 68a7752d733c09c6debfd9301517a7b5c913152f (diff) | |
| download | gem5-53d735b17ee1a3bd27173138ed1937a45f20bc12.tar.xz | |
config: Add missing point of coherency to memcheck script
Bring in line with changes to the XBar class.
Diffstat (limited to 'configs/example/memcheck.py')
| -rw-r--r-- | configs/example/memcheck.py | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/configs/example/memcheck.py b/configs/example/memcheck.py index 18c75376f..17cab8b04 100644 --- a/configs/example/memcheck.py +++ b/configs/example/memcheck.py @@ -285,6 +285,7 @@ make_cache_level(cachespec, cache_proto, len(cachespec), None) # Connect the lowest level crossbar to the memory last_subsys = getattr(system, 'l%dsubsys0' % len(cachespec)) last_subsys.xbar.master = system.physmem.port +last_subsys.xbar.point_of_coherency = True root = Root(full_system = False, system = system) if options.atomic: |