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| author | Steve Reinhardt <stever@eecs.umich.edu> | 2007-07-15 13:22:49 -0700 |
|---|---|---|
| committer | Steve Reinhardt <stever@eecs.umich.edu> | 2007-07-15 13:22:49 -0700 |
| commit | ad560a6642fbb752e608c02048fc2103e60093b3 (patch) | |
| tree | ae112612695b1ec27491f168a8b5e61ba32c04a1 /configs/example/memtest.py | |
| parent | 4bcfa916f1f12e8cda253ca7154e75fa1f71ca44 (diff) | |
| download | gem5-ad560a6642fbb752e608c02048fc2103e60093b3.tar.xz | |
Add --force-bus option to memtest.py.
--HG--
extra : convert_revision : 101735cca426903704ff2edaff051fa7c5bfc46c
Diffstat (limited to 'configs/example/memtest.py')
| -rw-r--r-- | configs/example/memtest.py | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/configs/example/memtest.py b/configs/example/memtest.py index 47853ffab..c9149865a 100644 --- a/configs/example/memtest.py +++ b/configs/example/memtest.py @@ -52,6 +52,8 @@ parser.add_option("-n", "--numtesters", type="int", default=8, parser.add_option("-t", "--treespec", type="string", help="Colon-separated multilevel tree specification") +parser.add_option("--force-bus", action="store_true", + help="Use bus between levels even with single cache") parser.add_option("-f", "--functional", type="int", default=0, metavar="PCT", @@ -129,7 +131,7 @@ system = System(funcmem = PhysicalMemory(), def make_level(spec, prototypes, attach_obj, attach_port): fanout = spec[0] parent = attach_obj # use attach obj as config parent too - if fanout > 1: + if fanout > 1 or options.force_bus: new_bus = Bus(clock="500MHz", width=16) new_bus.port = getattr(attach_obj, attach_port) parent.cpu_side_bus = new_bus |