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author | Andreas Hansson <andreas.hansson@arm.com> | 2012-02-14 03:41:53 -0500 |
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committer | Andreas Hansson <andreas.hansson@arm.com> | 2012-02-14 03:41:53 -0500 |
commit | 00978170f3b42ea83280c1b8f4b1610f5e352394 (patch) | |
tree | 347650c916f5625cfc7c8920a3aca6b99f36f0d3 /configs/example/ruby_fs.py | |
parent | 0d46708dc20c438d29bd724fb7d4b54d4d2f318a (diff) | |
download | gem5-00978170f3b42ea83280c1b8f4b1610f5e352394.tar.xz |
MEM: Fix master/slave ports in Ruby and non-regression scripts
This patch brings the Ruby and other scripts up to date with the
introduction of the master/slave ports.
Diffstat (limited to 'configs/example/ruby_fs.py')
-rw-r--r-- | configs/example/ruby_fs.py | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/configs/example/ruby_fs.py b/configs/example/ruby_fs.py index 04b99034c..869a10ef7 100644 --- a/configs/example/ruby_fs.py +++ b/configs/example/ruby_fs.py @@ -125,11 +125,11 @@ for (i, cpu) in enumerate(system.cpu): # # Tie the cpu ports to the correct ruby system ports # - cpu.icache_port = system.ruby._cpu_ruby_ports[i].port - cpu.dcache_port = system.ruby._cpu_ruby_ports[i].port + cpu.icache_port = system.ruby._cpu_ruby_ports[i].slave + cpu.dcache_port = system.ruby._cpu_ruby_ports[i].slave if buildEnv['TARGET_ISA'] == "x86": - cpu.itb.walker.port = system.ruby._cpu_ruby_ports[i].port - cpu.dtb.walker.port = system.ruby._cpu_ruby_ports[i].port + cpu.itb.walker.port = system.ruby._cpu_ruby_ports[i].slave + cpu.dtb.walker.port = system.ruby._cpu_ruby_ports[i].slave cpu.interrupts.pio = system.piobus.master cpu.interrupts.int_master = system.piobus.slave cpu.interrupts.int_slave = system.piobus.master |