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author | Andreas Hansson <andreas.hansson@arm.com> | 2013-01-07 13:05:38 -0500 |
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committer | Andreas Hansson <andreas.hansson@arm.com> | 2013-01-07 13:05:38 -0500 |
commit | e65de3f5ca1d1a91265d09b1950a2d69c620631b (patch) | |
tree | 032c2483fde6e6c79e79495862f7ee5dd490ffd9 /configs/example/ruby_mem_test.py | |
parent | 15a979c6be704a4bb083b64148d1a25d7fc4e682 (diff) | |
download | gem5-e65de3f5ca1d1a91265d09b1950a2d69c620631b.tar.xz |
config: Do not use hardcoded physmem in fs script
This patch generalises the address range resolution for the I/O cache
and I/O bridge such that they do not assume a single memory. The patch
involves adding a parameter to the system which is then defined based
on the memories that are to be visible from the I/O subsystem, whether
behind a cache or a bridge.
The change is needed to allow interleaved memory controllers in the
system.
Diffstat (limited to 'configs/example/ruby_mem_test.py')
0 files changed, 0 insertions, 0 deletions