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authorDaniel Sanchez <sanchezd@stanford.edu>2009-05-11 10:38:46 -0700
committerDaniel Sanchez <sanchezd@stanford.edu>2009-05-11 10:38:46 -0700
commit93f2f69657d0a2420a2c86b71505e6d27e6e2a38 (patch)
tree8022fec4e3f70b9fb777518d26116eb99b962f80 /configs/example/ruby_se.py
parentebf2f5aaddcb81ba39692b716ed9ad658df27cd8 (diff)
downloadgem5-93f2f69657d0a2420a2c86b71505e6d27e6e2a38.tar.xz
ruby: Working M5 interface and updated Ruby interface.
This changeset also includes a lot of work from Derek Hower <drh5@cs.wisc.edu> RubyMemory is now both a driver for Ruby and a port for M5. Changed makeRequest/hitCallback interface. Brought packets (superficially) into the sequencer. Modified tester infrastructure to be packet based. and Ruby can be used together through the example ruby_se.py script. SPARC parallel applications work, and the timing *seems* right from combined M5/Ruby debug traces. To run, % build/ALPHA_SE/m5.debug configs/example/ruby_se.py -c tests/test-progs/hello/bin/alpha/linux/hello -n 4 -t
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+# Copyright (c) 2006-2008 The Regents of The University of Michigan
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Steve Reinhardt
+
+# Simple test script
+#
+# "m5 test.py"
+
+import m5
+
+if m5.build_env['FULL_SYSTEM']:
+ m5.panic("This script requires syscall emulation mode (*_SE).")
+
+from m5.objects import *
+import os, optparse, sys
+from os.path import join as joinpath
+m5.AddToPath('../common')
+import Simulation
+#from Caches import *
+from cpu2000 import *
+
+# Get paths we might need. It's expected this file is in m5/configs/example.
+config_path = os.path.dirname(os.path.abspath(__file__))
+config_root = os.path.dirname(config_path)
+m5_root = os.path.dirname(config_root)
+
+parser = optparse.OptionParser()
+
+# Benchmark options
+parser.add_option("-c", "--cmd",
+ default=joinpath(m5_root, "tests/test-progs/hello/bin/alpha/linux/hello"),
+ help="The binary to run in syscall emulation mode.")
+parser.add_option("-o", "--options", default="",
+ help='The options to pass to the binary, use " " around the entire string')
+parser.add_option("-i", "--input", default="", help="Read stdin from a file.")
+parser.add_option("--output", default="", help="Redirect stdout to a file.")
+parser.add_option("--errout", default="", help="Redirect stderr to a file.")
+parser.add_option("--ruby-debug", action="store_true")
+parser.add_option("--ruby-debug-file", default="", help="Ruby debug out file (stdout if blank)")
+
+execfile(os.path.join(config_root, "common", "Options.py"))
+
+(options, args) = parser.parse_args()
+
+if args:
+ print "Error: script doesn't take any positional arguments"
+ sys.exit(1)
+
+if options.bench:
+ try:
+ if m5.build_env['TARGET_ISA'] != 'alpha':
+ print >>sys.stderr, "Simpoints code only works for Alpha ISA at this time"
+ sys.exit(1)
+ exec("workload = %s('alpha', 'tru64', 'ref')" % options.bench)
+ process = workload.makeLiveProcess()
+ except:
+ print >>sys.stderr, "Unable to find workload for %s" % options.bench
+ sys.exit(1)
+else:
+ process = LiveProcess()
+ process.executable = options.cmd
+ process.cmd = [options.cmd] + options.options.split()
+
+
+if options.input != "":
+ process.input = options.input
+if options.output != "":
+ process.output = options.output
+if options.errout != "":
+ process.errout = options.errout
+
+if options.detailed:
+ #check for SMT workload
+ workloads = options.cmd.split(';')
+ if len(workloads) > 1:
+ process = []
+ smt_idx = 0
+ inputs = []
+ outputs = []
+ errouts = []
+
+ if options.input != "":
+ inputs = options.input.split(';')
+ if options.output != "":
+ outputs = options.output.split(';')
+ if options.errout != "":
+ errouts = options.errout.split(';')
+
+ for wrkld in workloads:
+ smt_process = LiveProcess()
+ smt_process.executable = wrkld
+ smt_process.cmd = wrkld + " " + options.options
+ if inputs and inputs[smt_idx]:
+ smt_process.input = inputs[smt_idx]
+ if outputs and outputs[smt_idx]:
+ smt_process.output = outputs[smt_idx]
+ if errouts and errouts[smt_idx]:
+ smt_process.errout = errouts[smt_idx]
+ process += [smt_process, ]
+ smt_idx += 1
+
+(CPUClass, test_mem_mode, FutureClass) = Simulation.setCPUClass(options)
+
+CPUClass.clock = '1GHz'
+
+np = options.num_cpus
+
+rubymem = RubyMemory(
+ range = AddrRange("512MB"),
+ clock = "1GHz",
+ num_cpus = np,
+ libruby_file = "src/mem/ruby/amd64-linux/generated/MOESI_CMP_directory/bin/libruby.so",
+ config_file = "ruby.config",
+ stats_file = "m5out/ruby.stats"
+)
+
+if options.ruby_debug == True:
+ rubymem.debug = True
+ rubymem.debug_file = options.ruby_debug_file
+
+system = System(cpu = [CPUClass(cpu_id=i) for i in xrange(np)],
+ physmem = rubymem)
+
+if options.l2cache:
+ print "Error: -l2cache incompatible with ruby, must configure it ruby-style"
+ sys.exit(1)
+
+if options.caches:
+ print "Error: -caches incompatible with ruby, must configure it ruby-style"
+ sys.exit(1)
+
+for i in xrange(np):
+ system.cpu[i].connectMemPorts(system.physmem)
+
+
+ '''process = LiveProcess()
+ process.executable = options.cmd
+ process.cmd = [options.cmd, str(i)]
+ '''
+ system.cpu[i].workload = process
+
+ if options.fastmem:
+ system.cpu[i].physmem_port = system.physmem.port
+
+
+root = Root(system = system)
+
+Simulation.run(options, root, system, FutureClass)