diff options
| author | Andreas Hansson <andreas.hansson> | 2013-07-18 08:31:19 -0400 |
|---|---|---|
| committer | Andreas Hansson <andreas.hansson> | 2013-07-18 08:31:19 -0400 |
| commit | c20105c2ff2b8300fa18a5c3f1afb806d6ae9458 (patch) | |
| tree | c417dc17fae5bf5a9862536870101c58db9aa87b /configs/example/se.py | |
| parent | d4273cc9a6f3c00566e97ebcd71509ed14477b37 (diff) | |
| download | gem5-c20105c2ff2b8300fa18a5c3f1afb806d6ae9458.tar.xz | |
config: Update script to set cache line size on system
This patch changes the config scripts such that they do not set the
cache line size per cache instance, but rather for the system as a
whole.
Diffstat (limited to 'configs/example/se.py')
| -rw-r--r-- | configs/example/se.py | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/configs/example/se.py b/configs/example/se.py index 63f6ddc80..7b577239f 100644 --- a/configs/example/se.py +++ b/configs/example/se.py @@ -159,7 +159,8 @@ np = options.num_cpus system = System(cpu = [CPUClass(cpu_id=i) for i in xrange(np)], physmem = MemClass(range=AddrRange(options.mem_size)), mem_mode = test_mem_mode, - clk_domain = SrcClockDomain(clock = options.sys_clock)) + clk_domain = SrcClockDomain(clock = options.sys_clock), + cache_line_size = options.cacheline_size) # Create a separate clock domain for the CPUs system.cpu_clk_domain = SrcClockDomain(clock = options.cpu_clock) |