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author | Andreas Hansson <andreas.hansson@arm.com> | 2012-02-14 03:41:53 -0500 |
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committer | Andreas Hansson <andreas.hansson@arm.com> | 2012-02-14 03:41:53 -0500 |
commit | 00978170f3b42ea83280c1b8f4b1610f5e352394 (patch) | |
tree | 347650c916f5625cfc7c8920a3aca6b99f36f0d3 /configs/example/se.py | |
parent | 0d46708dc20c438d29bd724fb7d4b54d4d2f318a (diff) | |
download | gem5-00978170f3b42ea83280c1b8f4b1610f5e352394.tar.xz |
MEM: Fix master/slave ports in Ruby and non-regression scripts
This patch brings the Ruby and other scripts up to date with the
introduction of the master/slave ports.
Diffstat (limited to 'configs/example/se.py')
-rw-r--r-- | configs/example/se.py | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/configs/example/se.py b/configs/example/se.py index d7b876d46..de98fa002 100644 --- a/configs/example/se.py +++ b/configs/example/se.py @@ -190,8 +190,8 @@ for i in xrange(np): system.cpu[i].workload = multiprocesses[i] if options.ruby: - system.cpu[i].icache_port = system.ruby._cpu_ruby_ports[i].port - system.cpu[i].dcache_port = system.ruby._cpu_ruby_ports[i].port + system.cpu[i].icache_port = system.ruby._cpu_ruby_ports[i].slave + system.cpu[i].dcache_port = system.ruby._cpu_ruby_ports[i].slave if options.fastmem: system.cpu[0].physmem_port = system.physmem.port |