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| author | Kevin Lim <ktlim@umich.edu> | 2006-11-12 21:57:58 -0500 |
|---|---|---|
| committer | Kevin Lim <ktlim@umich.edu> | 2006-11-12 21:57:58 -0500 |
| commit | 3052632b68f842750c767caaf310fcbf116c559f (patch) | |
| tree | 9b4b05c13e5e9c964659122e85fff46a14b5e88f /configs/example/se.py | |
| parent | d2d44317528ffadf81fbb95c92291d8d2d4a2190 (diff) | |
| parent | 437436a2f706477439cfb81d254e8f7b454450a5 (diff) | |
| download | gem5-3052632b68f842750c767caaf310fcbf116c559f.tar.xz | |
Merge ktlim@zamp:./local/clean/tmp/test-regress
into zamp.eecs.umich.edu:/z/ktlim2/clean/newmem-busfix
--HG--
extra : convert_revision : b98236507bb8996ce605b48b5a5a6a7aac297dc5
Diffstat (limited to 'configs/example/se.py')
| -rw-r--r-- | configs/example/se.py | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/configs/example/se.py b/configs/example/se.py index 0a158244f..0944a030e 100644 --- a/configs/example/se.py +++ b/configs/example/se.py @@ -101,7 +101,7 @@ system = System(cpu = [CPUClass(cpu_id=i) for i in xrange(np)], system.physmem.port = system.membus.port for i in xrange(np): - if options.caches and not options.standard_switch and not FutureClass: + if options.caches: system.cpu[i].addPrivateSplitL1Caches(L1Cache(size = '32kB'), L1Cache(size = '64kB')) system.cpu[i].connectMemPorts(system.membus) |