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authorIru Cai <mytbk920423@gmail.com>2019-02-28 17:07:41 +0800
committerIru Cai <mytbk920423@gmail.com>2019-03-20 14:04:41 +0800
commitfbde0c1440501dd2f810f04470791bb78c800dd9 (patch)
tree050ae98929f2da5bb4712a3f1b33b7831d39c8cb /configs/example/se.py
parent04547cc295885bfd85d8b340e147c9c3faad86ab (diff)
downloadgem5-fbde0c1440501dd2f810f04470791bb78c800dd9.tar.xz
invisispec-1.0 configs
Diffstat (limited to 'configs/example/se.py')
-rw-r--r--configs/example/se.py4
1 files changed, 4 insertions, 0 deletions
diff --git a/configs/example/se.py b/configs/example/se.py
index 99d79bc57..6433b5d53 100644
--- a/configs/example/se.py
+++ b/configs/example/se.py
@@ -282,5 +282,9 @@ else:
CacheConfig.config_cache(options, system)
MemConfig.config_mem(options, system)
+# [InvisiSpec] Configure simulation scheme
+if CPUClass == DerivO3CPU:
+ CpuConfig.config_scheme(CPUClass, system.cpu, options)
+
root = Root(full_system = False, system = system)
Simulation.run(options, root, system, FutureClass)