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authorLisa Hsu <hsul@eecs.umich.edu>2006-11-01 11:49:39 -0500
committerLisa Hsu <hsul@eecs.umich.edu>2006-11-01 11:49:39 -0500
commit7665be4f7066dcc65cacc010ca740a01d57e08d5 (patch)
treedc512766c3f0aed9cc497114b9f7448e815e4161 /configs/example/se.py
parent9ef8bf74c7ab3d34889e804cb4b1e365da090d0b (diff)
downloadgem5-7665be4f7066dcc65cacc010ca740a01d57e08d5.tar.xz
make it so that you can do a standard switch without the caches option. this will have only the o3 cpu have a cache, rather than timing (warmup) + o3 have cache.
--HG-- extra : convert_revision : d733de7ebb362bbd7376a0235ee7f117df2d6d37
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