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author | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2019-02-04 13:31:23 +0000 |
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committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2019-02-07 12:59:11 +0000 |
commit | 34b73dea1b144fcc5707d618acd950f7f1506806 (patch) | |
tree | 81c45232f98bef4842211530716e0ca847d89568 /configs/example | |
parent | 53eadea55d0c9adc6a20f2587d6dcf622bda5396 (diff) | |
download | gem5-34b73dea1b144fcc5707d618acd950f7f1506806.tar.xz |
configs, arch-arm: Using AddrRange for Realview mem_regions
Physical memory ranges are now saved in Realview objects as pairs of
addresses (start address and size). This patch is substituting them with
a single AddrRange object.
Change-Id: I02d25d557c5c54d062f0dccef8ede45744d0ce6b
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/16206
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'configs/example')
-rw-r--r-- | configs/example/arm/devices.py | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/configs/example/arm/devices.py b/configs/example/arm/devices.py index e2c8be8af..0c08ea23d 100644 --- a/configs/example/arm/devices.py +++ b/configs/example/arm/devices.py @@ -207,9 +207,8 @@ class SimpleSystem(LinuxArmSystem): self.iobridge = Bridge(delay='50ns') # Device DMA -> MEM mem_range = self.realview._mem_regions[0] - max_size = long(mem_range[1]) - assert max_size >= long(Addr(mem_size)) - self.mem_ranges = [ AddrRange(start=mem_range[0], size=mem_size) ] + assert long(mem_range.size()) >= long(Addr(mem_size)) + self.mem_ranges = [ AddrRange(start=mem_range.start, size=mem_size) ] self._caches = caches if self._caches: self.iocache = IOCache(addr_ranges=[self.mem_ranges[0]]) |