ruby: FS support using the new configuration system

1 files changed, 16 insertions, 84 deletions

diff --git a/configs/example/ruby_fs.py b/configs/example/ruby_fs.py
index a4831f3bb..e30f40bd5 100644
--- a/configs/example/ruby_fs.py
+++ b/configs/example/ruby_fs.py
@@ -43,10 +43,10 @@ from m5.util import addToPath, panic
 if not buildEnv['FULL_SYSTEM']:
     panic("This script requires full-system mode (*_FS).")
 
-addToPath('../../tests/configs/')
 addToPath('../common')
+addToPath('../ruby')
 
-import ruby_config
+import Ruby
 
 from FSConfig import *
 from SysPaths import *
@@ -72,12 +72,6 @@ parser.add_option("-i", "--input", default="", help="Read stdin from a file.")
 parser.add_option("--output", default="", help="Redirect stdout to a file.")
 parser.add_option("--errout", default="", help="Redirect stderr to a file.")
 
-# ruby options
-parser.add_option("--ruby-debug", action="store_true")
-parser.add_option("--ruby-debug-file", default="", help="Ruby debug out file (stdout if blank)")
-parser.add_option("--protocol", default="", help="Ruby protocol compiled into binary")
-
-
 # ruby host memory experimentation
 parser.add_option("--cache_size", type="int")
 parser.add_option("--cache_assoc", type="int")
@@ -114,87 +108,25 @@ class CPUClass(TimingSimpleCPU): pass
 test_mem_mode = 'timing'
 FutureClass = None
 
-CPUClass.clock = '1GHz'
-
-#
-# Since we are running in timing mode, set the number of M5 ticks to ruby ticks
-# to the cpu clock frequency
-#
-M5_to_ruby_tick = '1000t'
-
-np = options.num_cpus
+CPUClass.clock = options.clock
 
-# check for max instruction count
-if options.max_inst:
-    max_inst = options.max_inst
-else:
-    max_inst = 0
-    
-# set cache size
-if options.cache_size:
-    cache_size = options.cache_size
-else:
-    cache_size = 32768 # 32 kB is default
-    
-# set cache assoc
-if options.cache_assoc:
-    cache_assoc = options.cache_assoc
-else:
-    cache_assoc = 8 # 8 is default
-    
-# set map levels
-if options.map_levels:
-    map_levels = options.map_levels
-else:
-    map_levels = 4 # 4 levels is the default
-
-if options.protocol == "MOESI_hammer":
-    ruby_config_file = "MOESI_hammer-homogeneous.rb"
-elif options.protocol == "MOESI_CMP_token":
-    ruby_config_file = "TwoLevel_SplitL1UnifiedL2.rb"
-elif options.protocol == "MI_example":
-    ruby_config_file = "MI_example-homogeneous.rb"
-else:
-    print "Error: unsupported ruby protocol"
-    sys.exit(1)
+physmem = PhysicalMemory()
 
-#
-# Currently, since ruby configuraiton is separate from m5, we need to manually
-# tell ruby that two dma ports are created by makeLinuxAlphaRubySystem().
-# Eventually, this will be fix with a unified configuration system.
-#
-rubymem = ruby_config.generate(ruby_config_file,
-                               np,
-                               np,
-                               128,
-                               False,
-                               cache_size,
-                               cache_assoc,
-                               map_levels,
-                               2,
-                               M5_to_ruby_tick)
-
-if options.ruby_debug == True:
-  rubymem.debug = True
-  rubymem.debug_file = options.ruby_debug_file
-
-system = makeLinuxAlphaRubySystem(test_mem_mode, rubymem, bm[0])
-
-system.cpu = [CPUClass(cpu_id=i) for i in xrange(np)]
-
-if options.l2cache:
-    print "Error: -l2cache incompatible with ruby, must configure it ruby-style"
-    sys.exit(1)
+system = makeLinuxAlphaRubySystem(test_mem_mode, physmem, bm[0])
 
-if options.caches:
-    print "Error: -caches incompatible with ruby, must configure it ruby-style"
-    sys.exit(1)
+system.ruby = Ruby.create_system(options,
+                                 physmem,
+                                 system.piobus,
+                                 system.dma_devices)
 
-for i in xrange(np):
-    system.cpu[i].connectMemPorts(system.physmem)
+system.cpu = [CPUClass(cpu_id=i) for i in xrange(options.num_cpus)]
 
-    if options.fastmem:
-        system.cpu[i].physmem_port = system.physmem.port
+for (i, cpu) in enumerate(system.cpu):
+    #
+    # Tie the cpu ports to the correct ruby system ports
+    #
+    cpu.icache_port = system.ruby.cpu_ruby_ports[i].port
+    cpu.dcache_port = system.ruby.cpu_ruby_ports[i].port
 
 root = Root(system = system)