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authorPierre-Yves Péneau <pierre-yves.peneau@lirmm.fr>2017-03-22 18:36:13 +0100
committerPierre-Yves Péneau <pierre-yves.peneau@lirmm.fr>2017-05-18 14:56:08 +0000
commit5bf2a86c6a8a1fc68422053e1a782d3efe0e6f3c (patch)
tree141c914c052d2f9eaedc52430b0960197d471263 /configs/example
parentaa651c7f8321bf96fc88f9a17285225000a753ec (diff)
downloadgem5-5bf2a86c6a8a1fc68422053e1a782d3efe0e6f3c.tar.xz
arm, config: added support for ex5 model of big.LITTLE
This patch enables using calibrated big and LITTLE cores, ex5_big and ex5_LITTLE instead of the default 'arm_detailed' and 'minor' cpus. The ex5 model is based on the Samsung Exynos 5 Octa (5422) SoC. Operation and memory hierarchy latencies have been calibrated using the lmbench micro-benchmark suite. The preliminary validation results have been published as: 'Full-System Simulation of big.LITTLE Multicore Architecture for Performance and Energy Exploration', in International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC'16), Lyon, France (Sep, 2016). From http://reviews.gem5.org/r/3666 Change-Id: I4935dee0a9222bd1bf7adfccb9443014945bb2d7 Signed-off-by: Anastasiia Butko <abutko@lbl.gov> Signed-off-by: Pierre-Yves Péneau <pierre-yves.peneau@lirmm.fr> Reviewed-on: https://gem5-review.googlesource.com/2464 Reviewed-by: Gabor Dozsa <gabor.dozsa@arm.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'configs/example')
-rw-r--r--configs/example/arm/fs_bigLITTLE.py18
1 files changed, 18 insertions, 0 deletions
diff --git a/configs/example/arm/fs_bigLITTLE.py b/configs/example/arm/fs_bigLITTLE.py
index d6825dfaa..3e7ac2f76 100644
--- a/configs/example/arm/fs_bigLITTLE.py
+++ b/configs/example/arm/fs_bigLITTLE.py
@@ -51,6 +51,8 @@ m5.util.addToPath("../../")
from common import SysPaths
from common import CpuConfig
+from common import ex5_big
+from common import ex5_LITTLE
import devices
from devices import AtomicCluster, KvmCluster
@@ -95,6 +97,21 @@ class LittleCluster(devices.CpuCluster):
super(LittleCluster, self).__init__(system, num_cpus, cpu_clock,
cpu_voltage, *cpu_config)
+class Ex5BigCluster(devices.CpuCluster):
+ def __init__(self, system, num_cpus, cpu_clock,
+ cpu_voltage="1.0V"):
+ cpu_config = [ CpuConfig.get("ex5_big"), ex5_big.L1I, ex5_big.L1D,
+ ex5_big.WalkCache, ex5_big.L2 ]
+ super(Ex5BigCluster, self).__init__(system, num_cpus, cpu_clock,
+ cpu_voltage, *cpu_config)
+
+class Ex5LittleCluster(devices.CpuCluster):
+ def __init__(self, system, num_cpus, cpu_clock,
+ cpu_voltage="1.0V"):
+ cpu_config = [ CpuConfig.get("ex5_LITTLE"), ex5_LITTLE.L1I,
+ ex5_LITTLE.L1D, ex5_LITTLE.WalkCache, ex5_LITTLE.L2 ]
+ super(Ex5LittleCluster, self).__init__(system, num_cpus, cpu_clock,
+ cpu_voltage, *cpu_config)
def createSystem(caches, kernel, bootscript, disks=[]):
sys = devices.SimpleSystem(caches, default_mem_size,
@@ -127,6 +144,7 @@ def createSystem(caches, kernel, bootscript, disks=[]):
cpu_types = {
"atomic" : (AtomicCluster, AtomicCluster),
"timing" : (BigCluster, LittleCluster),
+ "exynos" : (Ex5BigCluster, Ex5LittleCluster),
}
# Only add the KVM CPU if it has been compiled into gem5