diff options
| author | Curtis Dunham <Curtis.Dunham@arm.com> | 2015-04-08 15:56:06 -0500 |
|---|---|---|
| committer | Curtis Dunham <Curtis.Dunham@arm.com> | 2015-04-08 15:56:06 -0500 |
| commit | c3268f882029c7501867540ccf04db054fdff084 (patch) | |
| tree | 6c31899946f53d46a0b7bbbfe7fd5dc782dfde2c /configs/example | |
| parent | f05cb84ed1a61f81c26e4ea22f98454d12f069aa (diff) | |
| download | gem5-c3268f882029c7501867540ccf04db054fdff084.tar.xz | |
config: Support full-system with SST's memory system
This patch adds an example configuration in ext/sst/tests/ that allows
an SST/gem5 instance to simulate a 4-core AArch64 system with SST's
memHierarchy components providing all the caches and memories.
Diffstat (limited to 'configs/example')
| -rw-r--r-- | configs/example/fs.py | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/configs/example/fs.py b/configs/example/fs.py index 98c7db480..70a3b950e 100644 --- a/configs/example/fs.py +++ b/configs/example/fs.py @@ -98,7 +98,8 @@ def build_test_system(np): test_sys = makeArmSystem(test_mem_mode, options.machine_type, options.num_cpus, bm[0], options.dtb_filename, bare_metal=options.bare_metal, - cmdline=cmdline) + cmdline=cmdline, + external_memory=options.external_memory_system) if options.enable_context_switch_stats_dump: test_sys.enable_context_switch_stats_dump = True else: @@ -185,7 +186,7 @@ def build_test_system(np): test_sys.iocache = IOCache(addr_ranges = test_sys.mem_ranges) test_sys.iocache.cpu_side = test_sys.iobus.master test_sys.iocache.mem_side = test_sys.membus.slave - else: + elif not options.external_memory_system: test_sys.iobridge = Bridge(delay='50ns', ranges = test_sys.mem_ranges) test_sys.iobridge.slave = test_sys.iobus.master test_sys.iobridge.master = test_sys.membus.slave |