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authorGabe Black <gabeblack@google.com>2014-12-04 15:53:54 -0800
committerGabe Black <gabeblack@google.com>2014-12-04 15:53:54 -0800
commit22aaa5867f2449e2a73b7891fc34072c12c199b3 (patch)
tree6083ecfd34307076c8d9c55a450e6cc118025b95 /configs/example
parent3069c28a021d3f8c29221e537d48ee382c30646f (diff)
downloadgem5-22aaa5867f2449e2a73b7891fc34072c12c199b3.tar.xz
x86: Rework opcode parsing to support 3 byte opcodes properly.
Instead of counting the number of opcode bytes in an instruction and recording each byte before the actual opcode, we can represent the path we took to get to the actual opcode byte by using a type code. That has a couple of advantages. First, we can disambiguate the properties of opcodes of the same length which have different properties. Second, it reduces the amount of data stored in an ExtMachInst, making them slightly easier/faster to create and process. This also adds some flexibility as far as how different types of opcodes are handled, which might come in handy if we decide to support VEX or XOP instructions. This change also adds tables to support properly decoding 3 byte opcodes. Before we would fall off the end of some arrays, on top of the ambiguity described above. This change doesn't measureably affect performance on the twolf benchmark. --HG-- rename : src/arch/x86/isa/decoder/three_byte_opcodes.isa => src/arch/x86/isa/decoder/three_byte_0f38_opcodes.isa rename : src/arch/x86/isa/decoder/three_byte_opcodes.isa => src/arch/x86/isa/decoder/three_byte_0f3a_opcodes.isa
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