diff options
| author | Ali Saidi <Ali.Saidi@ARM.com> | 2012-03-01 17:26:31 -0600 |
|---|---|---|
| committer | Ali Saidi <Ali.Saidi@ARM.com> | 2012-03-01 17:26:31 -0600 |
| commit | 91b737ed48008ed295db22c857183f040a63234c (patch) | |
| tree | 03e4be02cd6846b632045b520ad7d9a588974bc9 /configs/example | |
| parent | 3876105bdb5589360c58389ffffff9786a93a2ff (diff) | |
| download | gem5-91b737ed48008ed295db22c857183f040a63234c.tar.xz | |
ARM: Add support for Versatile Express extended memory map
Also clean up how we create boot loader memory a bit.
Diffstat (limited to 'configs/example')
| -rw-r--r-- | configs/example/fs.py | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/configs/example/fs.py b/configs/example/fs.py index 41b4a75ae..7a0759e47 100644 --- a/configs/example/fs.py +++ b/configs/example/fs.py @@ -159,12 +159,12 @@ if bm[0]: else: mem_size = SysConfig().mem() if options.caches or options.l2cache: - test_sys.iocache = IOCache(addr_range=mem_size) + test_sys.iocache = IOCache(addr_range=test_sys.physmem.range) test_sys.iocache.cpu_side = test_sys.iobus.master test_sys.iocache.mem_side = test_sys.membus.slave else: test_sys.iobridge = Bridge(delay='50ns', nack_delay='4ns', - ranges = [AddrRange(mem_size)]) + ranges = [test_sys.physmem.range]) test_sys.iobridge.slave = test_sys.iobus.master test_sys.iobridge.master = test_sys.membus.slave @@ -195,7 +195,7 @@ if len(bm) == 2: if options.kernel is not None: drive_sys.kernel = binary(options.kernel) drive_sys.iobridge = Bridge(delay='50ns', nack_delay='4ns', - ranges = [AddrRange(bm[1].mem())]) + ranges = [drive_sys.physmem.range]) drive_sys.iobridge.slave = drive_sys.iobus.master drive_sys.iobridge.master = drive_sys.membus.slave |