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authorAndreas Hansson <andreas.hansson@arm.com>2013-04-22 13:20:33 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2013-04-22 13:20:33 -0400
commit3477d60d5c2f20644e301378ca2923766d765f8e (patch)
tree3ebea4940bab8c9c347bf56f1cef9db8b170ab0d /configs/example
parenta35d3ff167a50bcbaeffbefc46bde5f640a475f5 (diff)
downloadgem5-3477d60d5c2f20644e301378ca2923766d765f8e.tar.xz
config: Add a mem-type config option to se/fs scripts
This patch enables selection of the memory controller class through a mem-type command-line option. Behind the scenes, this option is treated much like the cpu-type, and a similar framework is used to resolve the valid options, and translate the short-hand description to a valid class. The regression scripts are updated with a hardcoded memory class for the moment. The best solution going forward is probably to get the memory out of the makeSystem functions, but Ruby complicates things as it does not connect the memory controller to the membus. --HG-- rename : configs/common/CpuConfig.py => configs/common/MemConfig.py
Diffstat (limited to 'configs/example')
-rw-r--r--configs/example/fs.py30
-rw-r--r--configs/example/se.py4
2 files changed, 22 insertions, 12 deletions
diff --git a/configs/example/fs.py b/configs/example/fs.py
index 1f8e2d3a7..4fedf12db 100644
--- a/configs/example/fs.py
+++ b/configs/example/fs.py
@@ -84,6 +84,11 @@ def is_kvm_cpu(cpu_class):
TestCPUClass.clock = options.clock
DriveCPUClass.clock = options.clock
+# Match the memories with the CPUs, the driver system always simple,
+# and based on the options for the test system
+DriveMemClass = SimpleMemory
+TestMemClass = Simulation.setMemClass(options)
+
if options.benchmark:
try:
bm = Benchmarks[options.benchmark]
@@ -100,16 +105,18 @@ else:
np = options.num_cpus
if buildEnv['TARGET_ISA'] == "alpha":
- test_sys = makeLinuxAlphaSystem(test_mem_mode, bm[0])
+ test_sys = makeLinuxAlphaSystem(test_mem_mode, TestMemClass, bm[0])
elif buildEnv['TARGET_ISA'] == "mips":
- test_sys = makeLinuxMipsSystem(test_mem_mode, bm[0])
+ test_sys = makeLinuxMipsSystem(test_mem_mode, TestMemClass, bm[0])
elif buildEnv['TARGET_ISA'] == "sparc":
- test_sys = makeSparcSystem(test_mem_mode, bm[0])
+ test_sys = makeSparcSystem(test_mem_mode, TestMemClass, bm[0])
elif buildEnv['TARGET_ISA'] == "x86":
- test_sys = makeLinuxX86System(test_mem_mode, options.num_cpus, bm[0])
+ test_sys = makeLinuxX86System(test_mem_mode, TestMemClass,
+ options.num_cpus, bm[0])
elif buildEnv['TARGET_ISA'] == "arm":
- test_sys = makeArmSystem(test_mem_mode, options.machine_type, bm[0],
- options.dtb_filename, bare_metal=options.bare_metal)
+ test_sys = makeArmSystem(test_mem_mode, options.machine_type,
+ TestMemClass, bm[0], options.dtb_filename,
+ bare_metal=options.bare_metal)
else:
fatal("Incapable of building %s full system!", buildEnv['TARGET_ISA'])
@@ -154,15 +161,16 @@ CacheConfig.config_cache(options, test_sys)
if len(bm) == 2:
if buildEnv['TARGET_ISA'] == 'alpha':
- drive_sys = makeLinuxAlphaSystem(drive_mem_mode, bm[1])
+ drive_sys = makeLinuxAlphaSystem(drive_mem_mode, DriveMemClass, bm[1])
elif buildEnv['TARGET_ISA'] == 'mips':
- drive_sys = makeLinuxMipsSystem(drive_mem_mode, bm[1])
+ drive_sys = makeLinuxMipsSystem(drive_mem_mode, DriveMemClass, bm[1])
elif buildEnv['TARGET_ISA'] == 'sparc':
- drive_sys = makeSparcSystem(drive_mem_mode, bm[1])
+ drive_sys = makeSparcSystem(drive_mem_mode, DriveMemClass, bm[1])
elif buildEnv['TARGET_ISA'] == 'x86':
- drive_sys = makeX86System(drive_mem_mode, np, bm[1])
+ drive_sys = makeX86System(drive_mem_mode, DriveMemClass, np, bm[1])
elif buildEnv['TARGET_ISA'] == 'arm':
- drive_sys = makeArmSystem(drive_mem_mode, options.machine_type, bm[1])
+ drive_sys = makeArmSystem(drive_mem_mode, options.machine_type,
+ DriveMemClass, bm[1])
drive_sys.cpu = DriveCPUClass(cpu_id=0)
drive_sys.cpu.createThreads()
diff --git a/configs/example/se.py b/configs/example/se.py
index a5f0204fd..6878742c8 100644
--- a/configs/example/se.py
+++ b/configs/example/se.py
@@ -150,13 +150,15 @@ else:
CPUClass.clock = options.clock
CPUClass.numThreads = numThreads
+MemClass = Simulation.setMemClass(options)
+
# Check -- do not allow SMT with multiple CPUs
if options.smt and options.num_cpus > 1:
fatal("You cannot use SMT with multiple CPUs!")
np = options.num_cpus
system = System(cpu = [CPUClass(cpu_id=i) for i in xrange(np)],
- physmem = SimpleMemory(range=AddrRange("512MB")),
+ physmem = MemClass(range=AddrRange("512MB")),
membus = CoherentBus(), mem_mode = test_mem_mode)
# Sanity check