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author | Daniel R. Carvalho <odanrc@yahoo.com.br> | 2019-09-03 12:22:59 +0200 |
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committer | Daniel Carvalho <odanrc@yahoo.com.br> | 2019-09-30 21:00:49 +0000 |
commit | c957d00dfeea618137cf14c02f6c20b0f02dbed3 (patch) | |
tree | 2ea21624a31c6333e9570beb9f1d0180aff6f043 /configs/example | |
parent | 3fee716f5626b19c53744fb4fdf67d061d3dd470 (diff) | |
download | gem5-c957d00dfeea618137cf14c02f6c20b0f02dbed3.tar.xz |
configs: Port CPUConfig to use the common object list
Factor out ObjectList functionality from CPUConfig.
Change-Id: I34ca55142e14559e584d38b6cca3aa5c20923521
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20589
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'configs/example')
-rw-r--r-- | configs/example/arm/devices.py | 10 | ||||
-rw-r--r-- | configs/example/arm/fs_bigLITTLE.py | 19 | ||||
-rw-r--r-- | configs/example/fs.py | 10 | ||||
-rw-r--r-- | configs/example/se.py | 5 |
4 files changed, 25 insertions, 19 deletions
diff --git a/configs/example/arm/devices.py b/configs/example/arm/devices.py index ff7a2a136..4d746edef 100644 --- a/configs/example/arm/devices.py +++ b/configs/example/arm/devices.py @@ -45,9 +45,9 @@ import m5 from m5.objects import * m5.util.addToPath('../../') from common.Caches import * -from common import CpuConfig +from common import ObjectList -have_kvm = "ArmV8KvmCPU" in CpuConfig.cpu_names() +have_kvm = "ArmV8KvmCPU" in ObjectList.cpu_list.get_names() class L1I(L1_ICache): tag_latency = 1 @@ -169,7 +169,8 @@ class CpuCluster(SubSystem): class AtomicCluster(CpuCluster): def __init__(self, system, num_cpus, cpu_clock, cpu_voltage="1.0V"): - cpu_config = [ CpuConfig.get("AtomicSimpleCPU"), None, None, None, None ] + cpu_config = [ ObjectList.cpu_list.get("AtomicSimpleCPU"), None, + None, None, None ] super(AtomicCluster, self).__init__(system, num_cpus, cpu_clock, cpu_voltage, *cpu_config) def addL1(self): @@ -177,7 +178,8 @@ class AtomicCluster(CpuCluster): class KvmCluster(CpuCluster): def __init__(self, system, num_cpus, cpu_clock, cpu_voltage="1.0V"): - cpu_config = [ CpuConfig.get("ArmV8KvmCPU"), None, None, None, None ] + cpu_config = [ ObjectList.cpu_list.get("ArmV8KvmCPU"), None, None, + None, None ] super(KvmCluster, self).__init__(system, num_cpus, cpu_clock, cpu_voltage, *cpu_config) def addL1(self): diff --git a/configs/example/arm/fs_bigLITTLE.py b/configs/example/arm/fs_bigLITTLE.py index dcc2a5dce..a1ad2ce73 100644 --- a/configs/example/arm/fs_bigLITTLE.py +++ b/configs/example/arm/fs_bigLITTLE.py @@ -53,7 +53,7 @@ from m5.objects import * m5.util.addToPath("../../") from common import SysPaths -from common import CpuConfig +from common import ObjectList from common import PlatformConfig from common.cores.arm import ex5_big, ex5_LITTLE @@ -85,32 +85,33 @@ def _using_pdes(root): class BigCluster(devices.CpuCluster): def __init__(self, system, num_cpus, cpu_clock, cpu_voltage="1.0V"): - cpu_config = [ CpuConfig.get("O3_ARM_v7a_3"), devices.L1I, devices.L1D, - devices.WalkCache, devices.L2 ] + cpu_config = [ ObjectList.cpu_list.get("O3_ARM_v7a_3"), + devices.L1I, devices.L1D, devices.WalkCache, devices.L2 ] super(BigCluster, self).__init__(system, num_cpus, cpu_clock, cpu_voltage, *cpu_config) class LittleCluster(devices.CpuCluster): def __init__(self, system, num_cpus, cpu_clock, cpu_voltage="1.0V"): - cpu_config = [ CpuConfig.get("MinorCPU"), devices.L1I, devices.L1D, - devices.WalkCache, devices.L2 ] + cpu_config = [ ObjectList.cpu_list.get("MinorCPU"), devices.L1I, + devices.L1D, devices.WalkCache, devices.L2 ] super(LittleCluster, self).__init__(system, num_cpus, cpu_clock, cpu_voltage, *cpu_config) class Ex5BigCluster(devices.CpuCluster): def __init__(self, system, num_cpus, cpu_clock, cpu_voltage="1.0V"): - cpu_config = [ CpuConfig.get("ex5_big"), ex5_big.L1I, ex5_big.L1D, - ex5_big.WalkCache, ex5_big.L2 ] + cpu_config = [ ObjectList.cpu_list.get("ex5_big"), ex5_big.L1I, + ex5_big.L1D, ex5_big.WalkCache, ex5_big.L2 ] super(Ex5BigCluster, self).__init__(system, num_cpus, cpu_clock, cpu_voltage, *cpu_config) class Ex5LittleCluster(devices.CpuCluster): def __init__(self, system, num_cpus, cpu_clock, cpu_voltage="1.0V"): - cpu_config = [ CpuConfig.get("ex5_LITTLE"), ex5_LITTLE.L1I, - ex5_LITTLE.L1D, ex5_LITTLE.WalkCache, ex5_LITTLE.L2 ] + cpu_config = [ ObjectList.cpu_list.get("ex5_LITTLE"), + ex5_LITTLE.L1I, ex5_LITTLE.L1D, ex5_LITTLE.WalkCache, + ex5_LITTLE.L2 ] super(Ex5LittleCluster, self).__init__(system, num_cpus, cpu_clock, cpu_voltage, *cpu_config) diff --git a/configs/example/fs.py b/configs/example/fs.py index 386421d4f..ee813ff5d 100644 --- a/configs/example/fs.py +++ b/configs/example/fs.py @@ -62,8 +62,9 @@ from common.SysPaths import * from common.Benchmarks import * from common import Simulation from common import CacheConfig -from common import MemConfig from common import CpuConfig +from common import MemConfig +from common import ObjectList from common import BPConfig from common.Caches import * from common import Options @@ -144,7 +145,8 @@ def build_test_system(np): test_sys.cpu = [TestCPUClass(clk_domain=test_sys.cpu_clk_domain, cpu_id=i) for i in range(np)] - if CpuConfig.is_kvm_cpu(TestCPUClass) or CpuConfig.is_kvm_cpu(FutureClass): + if ObjectList.is_kvm_cpu(TestCPUClass) or \ + ObjectList.is_kvm_cpu(FutureClass): test_sys.kvm_vm = KvmVM() if options.ruby: @@ -193,7 +195,7 @@ def build_test_system(np): # Sanity check if options.simpoint_profile: - if not CpuConfig.is_noncaching_cpu(TestCPUClass): + if not ObjectList.is_noncaching_cpu(TestCPUClass): fatal("SimPoint generation should be done with atomic cpu") if np > 1: fatal("SimPoint generation not supported with more than one CPUs") @@ -278,7 +280,7 @@ def build_drive_system(np): print("Error: a kernel must be provided to run in full system mode") sys.exit(1) - if CpuConfig.is_kvm_cpu(DriveCPUClass): + if ObjectList.is_kvm_cpu(DriveCPUClass): drive_sys.kvm_vm = KvmVM() drive_sys.iobridge = Bridge(delay='50ns', diff --git a/configs/example/se.py b/configs/example/se.py index f43206ad2..e1396bfa2 100644 --- a/configs/example/se.py +++ b/configs/example/se.py @@ -62,6 +62,7 @@ from common import Options from common import Simulation from common import CacheConfig from common import CpuConfig +from common import ObjectList from common import BPConfig from common import MemConfig from common.FileSystemConfig import config_filesystem @@ -206,7 +207,7 @@ if options.elastic_trace_en: for cpu in system.cpu: cpu.clk_domain = system.cpu_clk_domain -if CpuConfig.is_kvm_cpu(CPUClass) or CpuConfig.is_kvm_cpu(FutureClass): +if ObjectList.is_kvm_cpu(CPUClass) or ObjectList.is_kvm_cpu(FutureClass): if buildEnv['TARGET_ISA'] == 'x86': system.kvm_vm = KvmVM() for process in multiprocesses: @@ -217,7 +218,7 @@ if CpuConfig.is_kvm_cpu(CPUClass) or CpuConfig.is_kvm_cpu(FutureClass): # Sanity check if options.simpoint_profile: - if not CpuConfig.is_noncaching_cpu(CPUClass): + if not ObjectList.is_noncaching_cpu(CPUClass): fatal("SimPoint/BPProbe should be done with an atomic cpu") if np > 1: fatal("SimPoint generation not supported with more than one CPUs") |