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authorJason Lowe-Power <jason@lowepower.com>2019-04-05 10:43:59 -0700
committerJason Lowe-Power <jason@lowepower.com>2019-04-08 22:51:38 +0000
commit7f9c98472c97f8f71f71c7386496af67fc886d03 (patch)
treecce0efd8ddd742f6346a5781f36340009f1b989e /configs/learning_gem5/part3
parentc1e646d886096ffeca7d9818316ba5e03391898a (diff)
downloadgem5-7f9c98472c97f8f71f71c7386496af67fc886d03.tar.xz
learning_gem5,configs: Update ruby_test
Use SimpleMemory instead of DDR3 so we can use the timing results in tests. By using SimpleMemory, even if the DRAM timing changes the timing of this test won't change. I expect the timing of SimpleMemory to never change. Change-Id: I4c75981d7b8bfc4dcca59e628e89f5a6ea4c0e36 Signed-off-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17871 Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Diffstat (limited to 'configs/learning_gem5/part3')
-rw-r--r--configs/learning_gem5/part3/ruby_test.py4
1 files changed, 2 insertions, 2 deletions
diff --git a/configs/learning_gem5/part3/ruby_test.py b/configs/learning_gem5/part3/ruby_test.py
index a7ccbb576..9b14a7a8f 100644
--- a/configs/learning_gem5/part3/ruby_test.py
+++ b/configs/learning_gem5/part3/ruby_test.py
@@ -61,8 +61,8 @@ system.tester = RubyTester(checks_to_complete = 100,
wakeup_frequency = 10,
num_cpus = 2)
-# Create a DDR3 memory controller and connect it to the membus
-system.mem_ctrl = DDR3_1600_8x8()
+# Create a simple memory controller and connect it to the membus
+system.mem_ctrl = SimpleMemory(latency="50ns", bandwidth="0GB/s")
system.mem_ctrl.range = system.mem_ranges[0]
# Create the Ruby System