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authorNilay Vaish <nilay@cs.wisc.edu>2012-12-11 10:05:56 -0600
committerNilay Vaish <nilay@cs.wisc.edu>2012-12-11 10:05:56 -0600
commitf3d0be210f889da927d921d21a6c27ba94fde746 (patch)
treee72af115a12e885f22d1247c222182e474a21d8a /configs/ruby/MESI_CMP_directory.py
parentc120273708ca9843d15f4179c924bccc0f133d65 (diff)
downloadgem5-f3d0be210f889da927d921d21a6c27ba94fde746.tar.xz
ruby: add support for prefetching to MESI protocol
Diffstat (limited to 'configs/ruby/MESI_CMP_directory.py')
-rw-r--r--configs/ruby/MESI_CMP_directory.py6
1 files changed, 5 insertions, 1 deletions
diff --git a/configs/ruby/MESI_CMP_directory.py b/configs/ruby/MESI_CMP_directory.py
index 6694223cf..ffb14977f 100644
--- a/configs/ruby/MESI_CMP_directory.py
+++ b/configs/ruby/MESI_CMP_directory.py
@@ -87,6 +87,8 @@ def create_system(options, system, piobus, dma_ports, ruby_system):
start_index_bit = block_size_bits,
is_icache = False)
+ prefetcher = RubyPrefetcher.Prefetcher()
+
l1_cntrl = L1Cache_Controller(version = i,
cntrl_id = cntrl_count,
L1IcacheMemory = l1i_cache,
@@ -94,7 +96,9 @@ def create_system(options, system, piobus, dma_ports, ruby_system):
l2_select_num_bits = l2_bits,
send_evictions = (
options.cpu_type == "detailed"),
- ruby_system = ruby_system)
+ prefetcher = prefetcher,
+ ruby_system = ruby_system,
+ enable_prefetch = False)
cpu_seq = RubySequencer(version = i,
icache = l1i_cache,