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| author | Andreas Hansson <andreas.hansson@arm.com> | 2012-03-30 09:42:36 -0400 |
|---|---|---|
| committer | Andreas Hansson <andreas.hansson@arm.com> | 2012-03-30 09:42:36 -0400 |
| commit | a128ba7cd1ab506e3468c82c1060a7fb4ad909b1 (patch) | |
| tree | 626dc6046e0c8edb99a7f7a9db4c8ef7d8664636 /configs/ruby/MESI_CMP_directory.py | |
| parent | f9d403a7b95c50a8b75f8442101eb87ca465f967 (diff) | |
| download | gem5-a128ba7cd1ab506e3468c82c1060a7fb4ad909b1.tar.xz | |
Ruby: Remove the physMemPort and instead access memory directly
This patch removes the physMemPort from the RubySequencer and instead
uses the system pointer to access the physmem. The system already
keeps track of the physmem and the valid memory address ranges, and
with this patch we merely make use of that existing functionality. The
memory is modified so that it is possible to call the access functions
(atomic and functional) without going through the port, and the memory
is allowed to be unconnected, i.e. have no ports (since Ruby does not
attach it like the conventional memory system).
Diffstat (limited to 'configs/ruby/MESI_CMP_directory.py')
| -rw-r--r-- | configs/ruby/MESI_CMP_directory.py | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/configs/ruby/MESI_CMP_directory.py b/configs/ruby/MESI_CMP_directory.py index 4fdba3c27..28aba4a1b 100644 --- a/configs/ruby/MESI_CMP_directory.py +++ b/configs/ruby/MESI_CMP_directory.py @@ -96,8 +96,6 @@ def create_system(options, system, piobus, dma_devices, ruby_system): cpu_seq = RubySequencer(version = i, icache = l1i_cache, dcache = l1d_cache, - physMemPort = system.physmem.port, - physmem = system.physmem, ruby_system = ruby_system) l1_cntrl.sequencer = cpu_seq @@ -169,8 +167,6 @@ def create_system(options, system, piobus, dma_devices, ruby_system): # Create the Ruby objects associated with the dma controller # dma_seq = DMASequencer(version = i, - physMemPort = system.physmem.port, - physmem = system.physmem, ruby_system = ruby_system) dma_cntrl = DMA_Controller(version = i, |