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authorBrad Beckmann <Brad.Beckmann@amd.com>2010-01-29 20:29:23 -0800
committerBrad Beckmann <Brad.Beckmann@amd.com>2010-01-29 20:29:23 -0800
commit134cc3d48dc389aecbe6bebe27482e5e378eb692 (patch)
tree13589ed946a9f5d7192a285ae78a11b3bea3916e /configs/ruby/MOESI_hammer.py
parent3a835c7cbb481808a46a0491cf23b29378c0f866 (diff)
downloadgem5-134cc3d48dc389aecbe6bebe27482e5e378eb692.tar.xz
ruby: convert to M5 MemorySize
Converted both ruby caches and directory memory to use the M5 MemorySize python type.
Diffstat (limited to 'configs/ruby/MOESI_hammer.py')
-rw-r--r--configs/ruby/MOESI_hammer.py13
1 files changed, 6 insertions, 7 deletions
diff --git a/configs/ruby/MOESI_hammer.py b/configs/ruby/MOESI_hammer.py
index 5273f597b..dba31b8b7 100644
--- a/configs/ruby/MOESI_hammer.py
+++ b/configs/ruby/MOESI_hammer.py
@@ -37,17 +37,13 @@ from m5.util import addToPath
# Note: the L1 Cache latency is only used by the sequencer on fast path hits
#
class L1Cache(RubyCache):
- assoc = 2
latency = 3
- size = 32768
#
# Note: the L2 Cache latency is not currently used
#
class L2Cache(RubyCache):
- assoc = 16
latency = 15
- size = 1048576
def create_system(options, phys_mem, piobus, dma_devices):
@@ -74,9 +70,12 @@ def create_system(options, phys_mem, piobus, dma_devices):
#
# First create the Ruby objects associated with this cpu
#
- l1i_cache = L1Cache()
- l1d_cache = L1Cache()
- l2_cache = L2Cache()
+ l1i_cache = L1Cache(size = options.l1i_size,
+ assoc = options.l1i_assoc)
+ l1d_cache = L1Cache(size = options.l1d_size,
+ assoc = options.l1d_assoc)
+ l2_cache = L2Cache(size = options.l2_size,
+ assoc = options.l2_assoc)
cpu_seq = RubySequencer(icache = l1i_cache,
dcache = l1d_cache,