Config: corrects the way Ruby attaches to the DMA ports

With recent changes to the memory system, a port cannot be assigned a peer
port twice. While making use of the Ruby memory system in FS mode, DMA
ports were assigned peer twice, once for the classic memory system
and once for the Ruby memory system. This patch removes this double
assignment of peer ports.

1 files changed, 3 insertions, 6 deletions

diff --git a/configs/ruby/MOESI_hammer.py b/configs/ruby/MOESI_hammer.py
index dc9aa3392..3f9d31482 100644
--- a/configs/ruby/MOESI_hammer.py
+++ b/configs/ruby/MOESI_hammer.py
@@ -58,7 +58,7 @@ def define_options(parser):
     parser.add_option("--dir-on", action="store_true",
           help="Hammer: enable Full-bit Directory")
 
-def create_system(options, system, piobus, dma_devices, ruby_system):
+def create_system(options, system, piobus, dma_ports, ruby_system):
 
     if buildEnv['PROTOCOL'] != 'MOESI_hammer':
         panic("This script requires the MOESI_hammer protocol to be built.")
@@ -195,7 +195,7 @@ def create_system(options, system, piobus, dma_devices, ruby_system):
 
         cntrl_count += 1
 
-    for i, dma_device in enumerate(dma_devices):
+    for i, dma_port in enumerate(dma_ports):
         #
         # Create the Ruby objects associated with the dma controller
         #
@@ -208,10 +208,7 @@ def create_system(options, system, piobus, dma_devices, ruby_system):
                                    ruby_system = ruby_system)
 
         exec("system.dma_cntrl%d = dma_cntrl" % i)
-        if dma_device.type == 'MemTest':
-            exec("system.dma_cntrl%d.dma_sequencer.slave = dma_device.test" % i)
-        else:
-            exec("system.dma_cntrl%d.dma_sequencer.slave = dma_device.dma" % i)
+        exec("system.dma_cntrl%d.dma_sequencer.slave = dma_port" % i)
         dma_cntrl_nodes.append(dma_cntrl)
 
         if options.recycle_latency: