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| author | Nilay Vaish <nilay@cs.wisc.edu> | 2014-11-06 05:41:44 -0600 |
|---|---|---|
| committer | Nilay Vaish <nilay@cs.wisc.edu> | 2014-11-06 05:41:44 -0600 |
| commit | 95a0b184314cf0171a20fb7e71c845891dc56496 (patch) | |
| tree | 00590e68aa9d66c225a8f0d08f82eca2771e461d /configs/ruby/MOESI_hammer.py | |
| parent | 8ccfd9defa930d5c2904134d7a7286682e721db9 (diff) | |
| download | gem5-95a0b184314cf0171a20fb7e71c845891dc56496.tar.xz | |
ruby: single physical memory in fs mode
Both ruby and the system used to maintain memory copies. With the changes
carried for programmed io accesses, only one single memory is required for
fs simulations. This patch sets the copy of memory that used to reside
with the system to null, so that no space is allocated, but address checks
can still be carried out. All the memory accesses now source and sink values
to the memory maintained by ruby.
Diffstat (limited to 'configs/ruby/MOESI_hammer.py')
| -rw-r--r-- | configs/ruby/MOESI_hammer.py | 23 |
1 files changed, 19 insertions, 4 deletions
diff --git a/configs/ruby/MOESI_hammer.py b/configs/ruby/MOESI_hammer.py index 1c07ca945..2f9aaebc7 100644 --- a/configs/ruby/MOESI_hammer.py +++ b/configs/ruby/MOESI_hammer.py @@ -59,7 +59,7 @@ def define_options(parser): parser.add_option("--dir-on", action="store_true", help="Hammer: enable Full-bit Directory") -def create_system(options, system, dma_ports, ruby_system): +def create_system(options, full_system, system, dma_ports, ruby_system): if buildEnv['PROTOCOL'] != 'MOESI_hammer': panic("This script requires the MOESI_hammer protocol to be built.") @@ -224,7 +224,8 @@ def create_system(options, system, dma_ports, ruby_system): # Create the Ruby objects associated with the dma controller # dma_seq = DMASequencer(version = i, - ruby_system = ruby_system) + ruby_system = ruby_system, + slave = dma_port) dma_cntrl = DMA_Controller(version = i, dma_sequencer = dma_seq, @@ -232,7 +233,6 @@ def create_system(options, system, dma_ports, ruby_system): ruby_system = ruby_system) exec("ruby_system.dma_cntrl%d = dma_cntrl" % i) - exec("ruby_system.dma_cntrl%d.dma_sequencer.slave = dma_port" % i) dma_cntrl_nodes.append(dma_cntrl) if options.recycle_latency: @@ -242,7 +242,22 @@ def create_system(options, system, dma_ports, ruby_system): dma_cntrl.responseFromDir = ruby_system.network.master dma_cntrl.requestToDir = ruby_system.network.slave - all_cntrls = l1_cntrl_nodes + dir_cntrl_nodes + dma_cntrl_nodes + + # Create the io controller and the sequencer + if full_system: + io_seq = DMASequencer(version=len(dma_ports), ruby_system=ruby_system) + ruby_system._io_port = io_seq + io_controller = DMA_Controller(version = len(dma_ports), + dma_sequencer = io_seq, + ruby_system = ruby_system) + ruby_system.io_controller = io_controller + + # Connect the dma controller to the network + io_controller.responseFromDir = ruby_system.network.master + io_controller.requestToDir = ruby_system.network.slave + + all_cntrls = all_cntrls + [io_controller] + topology = create_topology(all_cntrls, options) return (cpu_sequencers, dir_cntrl_nodes, topology) |