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| author | Andreas Hansson <andreas.hansson@arm.com> | 2012-02-14 03:41:53 -0500 |
|---|---|---|
| committer | Andreas Hansson <andreas.hansson@arm.com> | 2012-02-14 03:41:53 -0500 |
| commit | 00978170f3b42ea83280c1b8f4b1610f5e352394 (patch) | |
| tree | 347650c916f5625cfc7c8920a3aca6b99f36f0d3 /configs/ruby/MOESI_hammer.py | |
| parent | 0d46708dc20c438d29bd724fb7d4b54d4d2f318a (diff) | |
| download | gem5-00978170f3b42ea83280c1b8f4b1610f5e352394.tar.xz | |
MEM: Fix master/slave ports in Ruby and non-regression scripts
This patch brings the Ruby and other scripts up to date with the
introduction of the master/slave ports.
Diffstat (limited to 'configs/ruby/MOESI_hammer.py')
| -rw-r--r-- | configs/ruby/MOESI_hammer.py | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/configs/ruby/MOESI_hammer.py b/configs/ruby/MOESI_hammer.py index f50315599..3f89a1a90 100644 --- a/configs/ruby/MOESI_hammer.py +++ b/configs/ruby/MOESI_hammer.py @@ -118,7 +118,7 @@ def create_system(options, system, piobus, dma_devices, ruby_system): l1_cntrl.sequencer = cpu_seq if piobus != None: - cpu_seq.pio_port = piobus.port + cpu_seq.pio_port = piobus.slave if options.recycle_latency: l1_cntrl.recycle_latency = options.recycle_latency @@ -213,9 +213,9 @@ def create_system(options, system, piobus, dma_devices, ruby_system): exec("system.dma_cntrl%d = dma_cntrl" % i) if dma_device.type == 'MemTest': - exec("system.dma_cntrl%d.dma_sequencer.port = dma_device.test" % i) + exec("system.dma_cntrl%d.dma_sequencer.slave = dma_device.test" % i) else: - exec("system.dma_cntrl%d.dma_sequencer.port = dma_device.dma" % i) + exec("system.dma_cntrl%d.dma_sequencer.slave = dma_device.dma" % i) dma_cntrl_nodes.append(dma_cntrl) if options.recycle_latency: |