diff options
author | Brad Beckmann <Brad.Beckmann@amd.com> | 2010-08-20 11:46:12 -0700 |
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committer | Brad Beckmann <Brad.Beckmann@amd.com> | 2010-08-20 11:46:12 -0700 |
commit | 808701a10c7d2b79feb3746c2b47c5faa3fca042 (patch) | |
tree | 7568c1ff50ad192134621f1e17e74e34154e69e7 /configs/ruby | |
parent | 64b2205992783b6b0268f18e1930a81b109600eb (diff) | |
download | gem5-808701a10c7d2b79feb3746c2b47c5faa3fca042.tar.xz |
memtest: Memtester support for DMA
This patch adds DMA testing to the Memtester and is inherits many changes from
Polina's old tester_dma_extension patch. Since Ruby does not work in atomic
mode, the atomic mode options are removed.
Diffstat (limited to 'configs/ruby')
-rw-r--r-- | configs/ruby/MESI_CMP_directory.py | 4 | ||||
-rw-r--r-- | configs/ruby/MI_example.py | 4 | ||||
-rw-r--r-- | configs/ruby/MOESI_CMP_directory.py | 4 | ||||
-rw-r--r-- | configs/ruby/MOESI_CMP_token.py | 4 | ||||
-rw-r--r-- | configs/ruby/MOESI_hammer.py | 4 |
5 files changed, 20 insertions, 0 deletions
diff --git a/configs/ruby/MESI_CMP_directory.py b/configs/ruby/MESI_CMP_directory.py index d336ca7e4..f6dafa44a 100644 --- a/configs/ruby/MESI_CMP_directory.py +++ b/configs/ruby/MESI_CMP_directory.py @@ -153,6 +153,10 @@ def create_system(options, system, piobus, dma_devices): dma_cntrl.dma_sequencer.port = dma_device.dma exec("system.dma_cntrl%d = dma_cntrl" % i) + if dma_device.type == 'MemTest': + system.dma_cntrl.dma_sequencer.port = dma_device.test + else: + system.dma_cntrl.dma_sequencer.port = dma_device.dma dma_cntrl_nodes.append(dma_cntrl) all_cntrls = l1_cntrl_nodes + \ diff --git a/configs/ruby/MI_example.py b/configs/ruby/MI_example.py index c51e19e09..0e101d18f 100644 --- a/configs/ruby/MI_example.py +++ b/configs/ruby/MI_example.py @@ -132,6 +132,10 @@ def create_system(options, system, piobus, dma_devices): dma_sequencer = dma_seq) exec("system.dma_cntrl%d = dma_cntrl" % i) + if dma_device.type == 'MemTest': + system.dma_cntrl.dma_sequencer.port = dma_device.test + else: + system.dma_cntrl.dma_sequencer.port = dma_device.dma dma_cntrl.dma_sequencer.port = dma_device.dma dma_cntrl_nodes.append(dma_cntrl) diff --git a/configs/ruby/MOESI_CMP_directory.py b/configs/ruby/MOESI_CMP_directory.py index ebc628fc0..4498617a9 100644 --- a/configs/ruby/MOESI_CMP_directory.py +++ b/configs/ruby/MOESI_CMP_directory.py @@ -151,6 +151,10 @@ def create_system(options, system, piobus, dma_devices): dma_sequencer = dma_seq) exec("system.dma_cntrl%d = dma_cntrl" % i) + if dma_device.type == 'MemTest': + system.dma_cntrl.dma_sequencer.port = dma_device.test + else: + system.dma_cntrl.dma_sequencer.port = dma_device.dma dma_cntrl.dma_sequencer.port = dma_device.dma dma_cntrl_nodes.append(dma_cntrl) diff --git a/configs/ruby/MOESI_CMP_token.py b/configs/ruby/MOESI_CMP_token.py index db704cfd8..f2669ef78 100644 --- a/configs/ruby/MOESI_CMP_token.py +++ b/configs/ruby/MOESI_CMP_token.py @@ -173,6 +173,10 @@ def create_system(options, system, piobus, dma_devices): dma_sequencer = dma_seq) exec("system.dma_cntrl%d = dma_cntrl" % i) + if dma_device.type == 'MemTest': + system.dma_cntrl.dma_sequencer.port = dma_device.test + else: + system.dma_cntrl.dma_sequencer.port = dma_device.dma dma_cntrl.dma_sequencer.port = dma_device.dma dma_cntrl_nodes.append(dma_cntrl) diff --git a/configs/ruby/MOESI_hammer.py b/configs/ruby/MOESI_hammer.py index 45b08a288..5cf27206b 100644 --- a/configs/ruby/MOESI_hammer.py +++ b/configs/ruby/MOESI_hammer.py @@ -139,6 +139,10 @@ def create_system(options, system, piobus, dma_devices): dma_sequencer = dma_seq) exec("system.dma_cntrl%d = dma_cntrl" % i) + if dma_device.type == 'MemTest': + system.dma_cntrl.dma_sequencer.port = dma_device.test + else: + system.dma_cntrl.dma_sequencer.port = dma_device.dma dma_cntrl.dma_sequencer.port = dma_device.dma dma_cntrl_nodes.append(dma_cntrl) |